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Editing 14 nm lithography process

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=== Composition ===
 
=== Composition ===
 
[[File:intel 14nm relative density.png|left|200px]][[File:relative percentage of elements on 14nm chip.png|right|400px]]
 
[[File:intel 14nm relative density.png|left|200px]][[File:relative percentage of elements on 14nm chip.png|right|400px]]
It's important to note that not all processes compete with each other. The process should cater to the products that will make use of the underlying technology. The composition of the actual integrated circuit also varies by manufacturer and by design due to different goals. For example, the cache on [[Apple]]'s 14 nm {{apple|A9}} (manufactured by Samsung) accounts almost 1/3 of the entire chip whereas [[Intel]]'s {{intel|Broadwell|l=arch}} cache accounts for only 10% of the entire chip. Likewise, [[Intel]]'s {{intel|Broadwell|l=arch}} and {{intel|Skylake|l=arch}} target high-performance and incorporate a large amount of higher-speed elements which are inherently sparse. Tall cells account for almost 30% Skylake's composition and less than 1% on Apple's {{apple|A8}} or {{apple|A9}}. Those numbers are somewhat expected given tall logic cells are generally optimized for performance and high frequency (e.g., high-switching circuitry in the [[CPU]]) whereas short cells are optimized for density (e.g., GPU shader arrays).
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It's important tot note that not all processes compete with each other. The process should cater to the products that will make use of the underlying technology. The composition of the actual integrated circuit also varies by manufacturer and by design due to different goals. For example, the cache on [[Apple]]'s 14 nm {{apple|A9}} (manufactured by Samsung) accounts almost 1/3 of the entire chip whereas [[Intel]]'s {{intel|Broadwell|l=arch}} cache accounts for only 10% of the entire chip. Likewise, [[Intel]]'s {{intel|Broadwell|l=arch}} and {{intel|Skylake|l=arch}} target high-performance and incorporate a large amount of higher-speed elements which are inherently sparse. Tall cells account for almost 30% Skylake's composition and less than 1% on Apple's {{apple|A8}} or {{apple|A9}}. Those numbers are somewhat expected given tall logic cells are generally optimized for performance and high frequency (e.g., high-switching circuitry in the [[CPU]]) whereas short cells are optimized for density (e.g., GPU shader arrays).
  
It should be noted that [[SRAM]] is the densest component of the process in a chip, with sometimes up to three or four times the density of logic cells that are used in the same process. It should be noted that in recent years, SRAM hasn't scaled as well as logic and I/O have either.
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It should be noted that [[SRAM]] is the most dense component of the process in a chip, with sometimes up to three or four times the density of logic cells that are used in the same process. It should be noted that in recent years, SRAM hasn't scaled as well as logic and I/O have either.
  
 
=== Intel ===
 
=== Intel ===

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