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Talk:MCST/microarchitectures/Elbrus

Elbrus (short name is e2k) is a processor architecture based on VLIW architecture family - microprocessors developed by the Russian company MCST.

Key features:

  • Very Long Instructuion Word: the ability to perform several operations (syllabels) in one cycle of operations, which provides high performance at a moderate clock frequency. Instruction size up to 512 bits.
  • Three hardware stacks:
    • Procedure Stack — PS. Stores procedure return addresses.
    • Procedure Chain Stack — PCS. Stores procedure arguments.
    • User Stack — US. For user data.
  • Register filw with 256 80 bit (in e2k version 5+ is 128bit) registers:
    • Register Window - procedure arguments are stored in register file
  • Predicate register file (32 2 bit registers)
  • Array Access Unit
  • Dynamic binary translation - emulation of the processor on the x86 architecture , used to run x86 programs (requires 2 cores to work). There are 2 types of binary translators:
    • RTC - user mode binary translator. This translator is used to execute guest Linux x86 applications in e2k host
    • Lintel - system binary translator. Allows to execute x86 operating systems such as Windows, Linux x86.
  • Protected mode - hardware control of the integrity of the memory structure, which ensures information security.

lack of microcode - the compiler translates the source code directly into binary code, bypassing microcode, as it is implemented on x86.