| Future? |  | If the chip has not been released yet, select "Yes", OTHERWISE LEAVE BLANK | 
| Type |  | If it's a microprocessor (default), LEAVE BLANK. | 
| Top Info: | 
| Name |  | The common name of the chip. | 
| No Image |  | Check this if we don't want to show an image placeholder | 
| Main Image | 	Upload file
 | Main Image | 
| Main Image Size |  | Image Size; normally leave blank! | 
| Main Image 2 | 	Upload file
 | Main Image 2 | 
| Main Image 2 Size |  | Image  2 Size; normally leave blank! | 
| Back Image | 	Upload file
 | Back Image | 
| Back Image Size |  | Image Size; normally leave blank! | 
| Caption |  | Caption for the image | 
| General Info: | 
| Designer | 
  
 
 
 
 
 | Designer(s) of the chip | 
| Manufacturer | 
  
 
 
 
 
 | Manufacturer(s) of the chip | 
| Model Number |  | Model number of the chip | 
| Part Number | 
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 | Part number(s) of the chip | 
| S-Spec | 
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 | S-Spec numbers | 
| S-Spec (QS) | 
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 | S-Spec Qualification Samples | 
| Market | 
  
 
 
 | Market | 
| Date Announced |  | The date announced | 
| Date Launched |  | The date launched | 
| Last Order |  | Last date to order | 
| Last Shipment |  | Last shippment | 
| Release Price |  | Price of product on release (if not box/tray specific) | 
| Release Price (tray) |  | Price of product on release FOR A TRAY | 
| Release Price (box) |  | Price of product on release FOR A BOX | 
| General Specs: | 
| Family | ,  | Chip Family | 
| Series |  | Chip Series | 
| Locked |  | Is it Locked? | 
| Frequency | 
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 | Base Frequency (1 or more set frequencies, NOT turbo) | 
| Turbo Frequency | 
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 | Turbo Frequency (goes by active cores) | 
| Turbo Frequency |  | Turbo Frequency (NOT per core) | 
| Bus type |  | bus type | 
| Bus speed |  | bus speed | 
| Bus rate |  ×  | bus links × bus rate | 
| Clock multiplier |  | clock multiplier | 
| CPUID | 
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 | CPUIDs | 
| Microarchitecture: | 
| ISA | 
 ISA:  
ISA Family:  
ISA 2:  
ISA 2 Family: 
 
 | ISA | 
| Microarchitecture | 
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 | Microarchitecture | 
| Platform |  | Platform | 
| Chipset | 
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 | Chipset | 
| Core Names | 
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 | Core Names | 
| Core family | 
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 | Core family | 
| Core model | 
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 | Core model | 
| Core stepping | 
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 | Core stepping | 
| Process | 
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 | Process | 
| Transistors |  | Transistors | 
| Technology |  | Technology | 
| Die | 
 Area: (mm²)  
Length:  × Width: 
 
 | Die | 
| MCP | 
  
Die count: 
 
 | Check this chip is in a multi-chip package | 
| Word Size |  | Word Size | 
| Cores |  | Cores | 
| Threads |  | Threads | 
| Max Memory |  | Max Memory | 
| Max Address Mem |  | Max Address Mem | 
| Multiprocessing: | 
| Max CPUs |  | Max CPUs | 
| SMP Interconnect |  | SMP Interconnect | 
| SMP Interconnect Links |  | SMP Interconnect Links | 
| SMP Interconnect Rate |  | SMP Interconnect Rate | 
| Electrical: | 
| Power dissipation |  | Power dissipation | 
| Power dissipation (average) |  | Power dissipation (average) | 
| Power dissipation (idle) |  | Power dissipation (idle) | 
| Vcore | 
  ±  
OR: 
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 | Core voltage | 
| VI/O | 
  ± , 
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 | I/O voltage | 
| SDP |  | SDP | 
| TDP | 
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 | TDP | 
| Typical TDP |  | Typical TDP | 
| cTDP-Down | 
  @ 
 
 | Configurable TDP-down & Frequency | 
| cTDP-Up | 
  @
 
 | Configurable TDP-up & Frequency | 
| Temperature (°C) | 
 Op Temp:  -  
Tjunction:  -  
Tcase:  -  
Tstorage:  -  
Tambient:  -  
TDTS:  - 
 
 | Temperatures (°C) | 
| Packaging: | 
| Package Module (DEPRECATED) | 
  
 
 
 | Package Module e.g., {{packages/amd/socket am4}} | 
| Package Info | 
  
 
 
 
 | Package Name, e.g. intel,fclga_3647. 
A page name amd/packages/socket_am4 is also accepted. 
 
List of package pages. | 
| Succession | 
| Predecessor | 
 Pred:  
Pred Link:  
Pred2:  
Pred2 Link:  
Pred3:  
Pred3 Link: 
Pred4:  
Pred4 Link:  
Pred5:  
Pred5 Link:  
 
 | Predecessor Core | 
| Successor | 
 Succ:  
Succ Link:  
Succ2:  
Succ2 Link:  
Succ3:  
Succ3 Link: 
Succ4:  
Succ4 Link:  
Succ5:  
Succ5 Link:  
 
 | Successor Core | 
| Contemporary | 
 Cont:  
Cont Link:  
Cont2:  
Cont2 Link:  
Cont3:  
Cont3 Link: 
Cont4:  
Cont4 Link:  
Cont5:  
Cont5 Link:  
 
 | Contemporary Core |