Template:mpu The Core i7-6950X Extreme Edition is a 64-bit deca-core top-of-the-line MPU introduced by Intel for the enthusiasts market in mid-2016. The i7-6950X replaced the i7-5960X as Intel's flagship microprocessor based on Broadwell microarchitecture - also becoming the first consumer-class deca-core microprocessor.

Cache

Main article: Broadwell § Cache

Cache Info [Edit Values]
L1I$	320 KiB 327,680 B 0.313 MiB	10x32 KiB 8-way set associative (per core)
L1D$	320 KiB 327,680 B 0.313 MiB	10x32 KiB 8-way set associative (per core)
L2$	2.5 MiB 2,560 KiB 2,621,440 B 0.00244 GiB	10x256 KiB 8-way set associative (per core)
L3$	25 MiB 25,600 KiB 26,214,400 B 0.0244 GiB	10x2.5 MiB 20-way set associative (shared)

Graphics

This processor has no integrated graphics processing unit.

Memory controller

Integrated Memory Controller
Type	DDR4-2133, DDR4-2400
Controllers	1
Channels	4
ECC Support	No
Max bandwidth	76.8 GB/s
Bandwidth (single)	19,200 MB/s
Bandwidth (dual)	38,400 MB/s
Bandwidth (quad)	76,800 MB/s
Max memory	128 GiB

Expansions

[Edit/Modify Expansions Info]

	Expansion Options
	PCIe Revision 3.0 Max Lanes 40 Configs 2x16 + 1x8

Features

[Edit/Modify Supported Features]

Supported x86 Extensions & Processor Features

MMX MMX Extension SSE Streaming SIMD Extensions SSE2 Streaming SIMD Extensions 2 SSE3 Streaming SIMD Extensions 3 SSSE3 Supplemental SSE3 AVX Advanced Vector Extensions AVX2 Advanced Vector Extensions 2 BMI1 Bit Manipulation Instruction Set 1 BMI2 Bit Manipulation Instruction Set 2 FMA3 3-Operand Fused-Multiply-Add AES AES Encryption Instructions F16C 16-bit Floating Point Conversion NX No-eXecute HT Hyper-Threading TBT 2.0 Turbo Boost Technology 2.0 TBMT 3.0 Turbo Boost Max Technology 3.0 EIST Enhanced SpeedStep Technology EPT Extended Page Tables (SLAT)

Die Shot

• 3,400,000,000 transistors
• 246 mm²

Documents

• Intel® Core i7 processor family for X-series platforms Product Brief

See also

• Core i7 Extreme Edition