Template:mpu The Xeon E5-2696 v4 is a 64-bit docosa-core x86 microprocessor introduced by Intel in 2016. This server MPU is designed for 2S environments. Operating at 2.2 GHz with a turbo boost frequency of 3.7 GHz for a single active core, this MPU has a TDP of 150 W and is manufactured on a 14 nm process (based on Broadwell).

Cache

Main article: Broadwell § Cache

Cache Info [Edit Values]
L1I$	704 KiB 720,896 B 0.688 MiB	22x32 KiB 8-way set associative (per core, write-back)
L1D$	704 KiB 720,896 B 0.688 MiB	22x32 KiB 8-way set associative (per core, write-back)
L2$	5.5 MiB 5,632 KiB 5,767,168 B 0.00537 GiB	22x256 KiB 8-way set associative (per core, write-back)
L3$	55 MiB 56,320 KiB 57,671,680 B 0.0537 GiB	22x2.5 MiB 20-way set associative (shared, per core, write-back)

Graphics

This microprocessor has no integrated graphics processing unit.

Memory controller

Integrated Memory Controller
Type	DDR4-2400
Controllers	1
Channels	4
ECC Support	Yes
Max bandwidth	71.53 GiB/s
Bandwidth (single)	17.88 GiB/s
Bandwidth (dual)	35.76 GiB/s
Max memory	1,536 GiB
Physical Address Extensions	46 bit