Corrections needed with the address space

x86 is exceptional in that it doesn't really care about alignment, not just of instructions (they're variable length, it has no choice) but of data. Many RISC architectures would work with units of 4 bytes, as such they only needed 30 bit addresses. I've seen some archs that have instructions for load the high 2 bytes, load the low 2 bytes of a 4 byte range.

Anyway when considering how much memory it can address it probably should be 2^28, not 2^26, so that's 256 mb not 64 mb - that or it has a 24 bit program counter. Alec (talk) 13:22, 27 June 2017 (EDT)