Template:mpu AMD-K6-IIIE+/500ACR is a 32-bit x86 embedded microprocessor designed by AMD and introduced in late 2000. This MPU which was manufactured on a 0.18 µm process, based on K6-III microarchitecture, operated at 500 MHz with a bus of 100 MHz and a multiplier of 5. This chip had a TDP of 14.5 W.

Cache

Main article: K6-III § Cache

L3$ can be 512 KiB to 2 MiB, depending on manufacturer and motherboard model. L3$ is off-chip.

Cache Info [Edit Values]
L1I$	32 KiB 32,768 B 0.0313 MiB	1x32 KiB 2-way set associative
L1D$	32 KiB 32,768 B 0.0313 MiB	1x32 KiB 2-way set associative
L2$	256 KiB 0.25 MiB 262,144 B 2.441406e-4 GiB	1x256 KiB 4-way set associative (shared)

Graphics

This processors has no integrated graphics processing unit.

Features

• Auto-power down state
• Stop clock state
• Halt state