-
WikiChip
WikiChip
-
Architectures
Popular x86
-
Intel
- Client
- Server
- Big Cores
- Small Cores
-
AMD
Popular ARM
-
ARM
- Server
- Big
- Little
-
Cavium
-
Samsung
-
-
Chips
Popular Families
-
Ampere
-
Apple
-
Cavium
-
HiSilicon
-
MediaTek
-
NXP
-
Qualcomm
-
Renesas
-
Samsung
-
From WikiChip
100K - Fairchild
Fairchild 100K | |
Developer | Fairchild |
Manufacturer | Fairchild |
Type | Discrete Logic |
Introduction | 1977 (launch) |
Technology | ECL |
Succession | |
← | |
10K |
Fairchild 100K (F-100K) was a family of very high-speed discrete logic chips introduced by Fairchild Semiconductor in the late 1970s. The 100K series was implemented using emitter-coupled logic (ECL) making those chips considerably faster than comparable Schottky TTL-based chips. Many early high-speed systems made use of those chips.
This article is still a stub and needs your attention. You can help improve this article by editing this page and adding the missing information. |
Retrieved from "https://en.wikichip.org/w/index.php?title=fairchild/100k&oldid=43231"
Facts about "100K - Fairchild"
designer | Fairchild + |
first launched | 1977 + |
full page name | fairchild/100k + |
instance of | integrated circuit family + |
main designer | Fairchild + |
manufacturer | Fairchild + |
name | Fairchild 100K + |
technology | ECL + |