Template:mpu The CN3120-500 EXP is a 64-bit dual-core MIPS communication microprocessor designed by Cavium and introduced in 2006. This processor, which incorporates two cnMIPS cores, operates at 500 MHz. This processor includes a number of hardware accelerators for network processing such as compression & decompression, RegEx engine, TCP, and QoS. This MPU supports up to 4 GiB of 64-bit DDR2-667 ECC memory.