From WikiChip
CN3005-300 SCP - Cavium
< cavium‎ | octeon
Revision as of 05:31, 8 December 2016 by ChipIt (talk | contribs) (Created page with "{{cavium title|CN3005-300 SCP}} {{mpu | name = Cavium CN3005-300 SCP | no image = cn3005-15.png | image = | image size = | c...")
(diff) ← Older revision | Latest revision (diff) | Newer revision → (diff)

Template:mpu The CN3005-300 SCP is a 64-bit single-core MIPS secure communication microprocessor (SCP) designed by Cavium and introduced in 2005. This processor, which incorporates a single cnMIPS core, operates at 300 MHz and dissipates 2 Watts. This processors includes a number of hardware security communication accelerators including units for encryption, QoS, and TCP acceleration.