From WikiChip
i486DX4-100 - Intel
< intel‎ | 80486
Revision as of 21:56, 20 September 2016 by ChipIt (talk | contribs) (Cache)

Template:mpu i486DX4-100 was a fourth-generation x86 microprocessor introduced by Intel in 1994. This chip, which is based on the 80486 microarchitecture, had a clock multiplier of x2, x2.5, and x3 with a max operating frequency of 100 MHz, three times the bus frequency. Like the original i486DX, this chip implemented the 80387 FPU on-die and incorporated System Management Mode (SMM). The DX4 series had twice as much cache space as the older processors.

Cache

Main article: 80486 § Cache
Cache Info [Edit Values]
L1$ 8 KiB
8,192 B
0.00781 MiB
1x8 KiB 4-way set associative (unified, write-through policy)

Graphics

This chip had no integrated graphics processing unit.

Features

Gallery

See also

Facts about "i486DX4-100 - Intel"
l1$ description4-way set associative +
l1$ size8 KiB (8,192 B, 0.00781 MiB) +