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• intel/80486
  ...algorithms were used to implement the new [[FPU]] yielding faster floating point calculations.
  8 KB (953 words) - 08:27, 29 October 2022
• exponential technology/x704
  ...way pipeline - capable of issuing 1 arithmetic (either integer or floating point, but not both), a single load/store operation, and a branch instruction.
  8 KB (1,228 words) - 20:49, 2 June 2019
• microarchitecture
  ...complete elements such as [[arithmetic logic unit]]s (ALUs) and [[floating point unit]]s (FPUs). Each of those microarchitectural elements are in turn repre
  3 KB (431 words) - 22:51, 21 November 2017
• amd/k6-2
  ...ng point]] SIMD instructions. The addition of {{x86|3DNow!}} gave floating point calculations a serious performance boost and a much necessery boost since [
  13 KB (1,969 words) - 18:07, 2 October 2019
• princeton/piton
  ...dified [[OpenSPARC T1]] core (+L1$), an L1.5 cache, L2 cache, a [[floating-point unit]] (FPU), a CPU Cache-Crossbar (CCX) arbiter, and three [[network on ch
  6 KB (731 words) - 15:41, 5 July 2018
• amd/microarchitectures/k6
  ** Floating point
  4 KB (578 words) - 18:57, 22 May 2019
• amd/microarchitectures/zen
  *** Floating Point (96, up from 60) ...e partitioning - every core is an independent core with its own [[floating-point]]/[[SIMD]] units and a [[L2]] cache. Previously, those units were shared be
  79 KB (12,095 words) - 15:27, 9 June 2023
• amd/microarchitectures/zen 2
  ...rom {{\\|Zen+}} but improves the instruction stream bandwidth and floating-point throughput performance. ...spatch unit distributes macro-ops to the out-of-order integer and floating point execution units. It can dispatch up to six macro-ops per cycle.
  57 KB (8,701 words) - 22:11, 9 October 2022
• pezy/pezy-scx/pezy-sc2
  ...kloads, the PEZY-SC2 introduced support for 16-bit half precision floating point support. At 1 GHz, the SC2 can peak at 16.4 TFLOPS for half precision.
  5 KB (683 words) - 11:15, 22 September 2018
• x86/extensions
  ...K6-2|l=arch}} || SIMD extension for manipulating single-precision floating point ...|l=arch}} || Streaming SIMD Extensions, SIMD for single-precision floating point
  6 KB (764 words) - 08:53, 7 June 2020
• cavium/microarchitectures/cnmips
  ...ed for network applications, the [[FPU]] was omitted as complex [[floating point]] operations are uncommon.
  7 KB (870 words) - 19:38, 23 June 2017
• intel/microarchitectures/gen9.5
  ...computed in the HS stage) to tessellate U,V parametric domains into domain point topologies. ...lock to pipelines capable of integer, single and double precision floating point operations, SIMD branch capability, logical operations, transcendental oper
  29 KB (3,752 words) - 13:14, 19 April 2023
• intel/microarchitectures/gen9
  ** Floating point atomics (min/max/cmpexch) ** 16-bit floating point capability is improved with native support for denormals and gradual underf
  33 KB (4,255 words) - 17:41, 1 November 2018
• ibm/microarchitectures/power9
  *** Roughly 5 stages were also eliminated for fixed-point operations *** Up to 8 cycles were eliminated for floating-point operations
  14 KB (1,905 words) - 23:38, 22 May 2020
• phytium/microarchitectures/xiaomi
  ...s can be dispatched each cycle. Everything is done [[in-order]] up to this point. [[File:phytim xiaomi fp eu.png|thumb|right|Floating-point execution unt]]
  7 KB (940 words) - 00:12, 8 March 2021
• amd/microarchitectures/zen 3
  *** Floating point unit: **** Fifth and sixth dedicated execution ports added for floating point store and FP-to-int transfer, no longer sharing 2nd FADD port.
  15 KB (1,978 words) - 22:13, 6 April 2023
• intel/microarchitectures/merced
  ** FPU can be accessed from the integer side by floating point get and set instructions. ...ree ports are available for branch execution, and two more handle floating point instructions.
  7 KB (978 words) - 21:16, 20 January 2021
• arm holdings/microarchitectures/cortex-a55
  ** Up to 8x 16-bit [[floating point]] per cycle
  4 KB (603 words) - 04:23, 27 April 2023
• mirc/identifiers/$int
  ...c title|$int Identifier}}'''$int''' Returns the integer part of a floating point number with no rounding.
  633 bytes (86 words) - 20:40, 13 August 2018
• dec/microarchitectures/alpha 21064
  ** Support for VAX floating point
  4 KB (527 words) - 02:09, 4 August 2017

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