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CN3850-400 NSP - Cavium
<
cavium
|
octeon
Revision as of 19:16, 10 December 2016 by
ChipIt
(
talk
|
contribs
)
(Created page with "{{cavium title|CN3850-400 NSP}} {{mpu | name = Cavium CN3850-400 NSP | no image = | image = octeon cn38xx.png | image size =...")
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Template:mpu
Facts about "
CN3850-400 NSP - Cavium
"
RDF feed
Has subobject
"Has subobject" is a predefined property representing a
container
construct and is provided by
Semantic MediaWiki
.
CN3850-400 NSP - Cavium#package
+
base frequency
400 MHz (0.4 GHz, 400,000 kHz)
+
core count
12
+
core name
cnMIPS
+
designer
Cavium
+
family
OCTEON
+
first announced
September 13, 2004
+
first launched
June 1, 2005
+
full page name
cavium/octeon/cn3850-400bg1521-nsp
+
has ecc memory support
true
+
has hardware accelerators for cryptography
true
+
has hardware accelerators for data compression
true
+
has hardware accelerators for data decompression
true
+
has hardware accelerators for network quality of service processing
true
+
has hardware accelerators for regular expression
true
+
has hardware accelerators for tcp packet processing
true
+
instance of
microprocessor
+
isa
MIPS64
+
isa family
MIPS
+
l1$ size
480 KiB (491,520 B, 0.469 MiB)
+
l1d$ description
64-way set associative
+
l1d$ size
96 KiB (98,304 B, 0.0938 MiB)
+
l1i$ description
64-way set associative
+
l1i$ size
384 KiB (393,216 B, 0.375 MiB)
+
l2$ description
8-way set associative
+
l2$ size
1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB)
+
ldate
June 1, 2005
+
main image
+
manufacturer
TSMC
+
market segment
Networking
+
max cpu count
1
+
max memory
16,384 MiB (16,777,216 KiB, 17,179,869,184 B, 16 GiB, 0.0156 TiB)
+
max memory bandwidth
11.92 GiB/s (12,206.08 MiB/s, 12.799 GB/s, 12,799.003 MB/s, 0.0116 TiB/s, 0.0128 TB/s)
+
max memory channels
1
+
microarchitecture
cnMIPS
+
model number
CN3850-400 NSP
+
name
Cavium CN3850-400 NSP
+
package
FCBGA-1521
+
part number
CN3850-400BG1521-NSP
+
process
130 nm (0.13 μm, 1.3e-4 mm)
+
series
CN3800
+
smp max ways
1
+
supported memory type
DDR2-800
+
technology
CMOS
+
thread count
12
+
word size
64 bit (8 octets, 16 nibbles)
+