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From WikiChip
cnMIPS - Microarchitectures - Cavium
< cavium
Edit Values | |
cnMIPS µarch | |
General Info |
cnMIPS or cnMIPS64 is the first microarchitecture implementing the MIPS64 ISA designed by Cavium for their Octeon family of processors. The "cn" stands for "Cavium Networks" or "content networking".
History
The cnMIPS was Cavium's first microarchitecture developed completely in-house from the ground up. The cnMIPS is also the first implementation of the MIPS64 Release 2 ISA. The design was done by a group of 35 engineers who previously worked on DEC's EV7 based in Marlboro, Massachusetts under the lead of Cavium's CTO Richard Kessler (who was previously the chief architect of the EV7). The fully custom final design proved to be around three to five times faster than the synthesized MIPS64 core.