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Edge TPU - Google
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Edge TPU
edge tpu (front).png
General Info
DesignerGoogle
Model NumberTPU Edge
MarketEmbedded, Edge Computing
IntroductionJuly 25, 2018 (announced)
July 25, 2018 (launched)
General Specs
FamilyTPU
Microarchitecture
TechnologyCMOS
Packaging
edge tpu (back).png

Edge TPU is a neural processor designed by Google and introduced in early 2019 for inference acceleration of machine learning at the edge. The Edge TPU supports 16-bit and 8-bit integer operations and can interface with external components over USB or PCIe.

Utilizing devices

  • Coral Dev Board
  • Coral USB Accelerator
  • Dev Board Mini
  • Mini PCIe Accelerator
  • M.2 Accelerator A+E key
  • M.2 Accelerator B+M key
  • System-on-Module (SoM)
  • Accelerator Module

This list is incomplete; you can help by expanding it.

External links

Retrieved from "https://en.wikichip.org/w/index.php?title=google/tpu/edge_tpu&oldid=95710"
Facts about "Edge TPU - Google"
RDF feed
back imageFile:edge tpu (back).png +
designerGoogle +
familyTPU +
first announcedJuly 25, 2018 +
first launchedJuly 25, 2018 +
full page namegoogle/tpu/edge tpu +
instance ofmicroprocessor +
ldateJuly 25, 2018 +
main imageFile:edge tpu (front).png +
market segmentEmbedded + and Edge Computing +
model numberTPU Edge +
nameEdge TPU +
technologyCMOS +