Semiconductor & Computer Engineering
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R-Car V2H - Renesas
Template:mpu R-Car V2H is high-performance embedded 64-bit dual-core arm SoC designed by Renesas for the automotive industry and introduced in 2014. The V2H has two Cortex-A15 cores operating at 1 GHz and incorporates the Imagination PowerVR SGX531 GPU. This SoC supports up to DDR3-1600 memory.
Facts about "R-Car V2H - Renesas"
| Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | R-Car V2H - Renesas#package + |
| base frequency | 1,000 MHz (1 GHz, 1,000,000 kHz) + |
| core count | 2 + |
| core name | Cortex-A15 + |
| core voltage | 1.03 V (10.3 dV, 103 cV, 1,030 mV) + |
| designer | Renesas + and ARM Holdings + |
| family | R-Car + |
| first announced | August 28, 2014 + |
| first launched | October 2016 + |
| full page name | renesas/r-car/v2h + |
| has ecc memory support | true + |
| instance of | microprocessor + |
| integrated gpu | PowerVR SGX531 + |
| integrated gpu designer | Imagination Technologies + |
| io voltage | 3.3 V (33 dV, 330 cV, 3,300 mV) + |
| isa | ARMv8 + |
| isa family | ARM + |
| l1$ size | 128 KiB (131,072 B, 0.125 MiB) + |
| l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
| l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
| l2$ size | 1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) + |
| ldate | October 2016 + |
| main image |  + |
| manufacturer | TSMC + |
| market segment | Embedded + |
| max cpu count | 1 + |
| max memory bandwidth | 5.96 GiB/s (6,103.04 MiB/s, 6.4 GB/s, 6,399.501 MB/s, 0.00582 TiB/s, 0.0064 TB/s) + |
| max memory channels | 1 + |
| microarchitecture | Cortex-A15 + |
| model number | V2H + |
| name | R-Car V2H + |
| package | FCBGA-64 + |
| part number | R8A7792 + |
| process | 28 nm (0.028 μm, 2.8e-5 mm) + |
| series | 2nd Gen + |
| smp max ways | 1 + |
| supported memory type | DDR3-1600 + |
| technology | CMOS + |
| thread count | 2 + |
| word size | 64 bit (8 octets, 16 nibbles) + |
