Template:mpu K6-2/333AFR was a 32-bit x86 K6-2-based microprocessor designed and manufactured in 1998 by AMD. Manufactured using a 0.25 µm process, this MPU operated at 333 MHz with a FSB of 95 MHz consumed 19 W. Note that K6-2/333AFR-66 is an identical model with a multiplier of 5 instead of 3.6 designed to support a 66 MHz bus instead.

Cache

Main article: K6-2 § Cache

L2$ can be 512 KiB to 2 MiB, depending on manufacturer and motherboard model. L2$ is off-chip.

Cache Info [Edit Values]
L1I$	32 KiB 32,768 B 0.0313 MiB	1x32 KiB 2-way set associative
L1D$	32 KiB 32,768 B 0.0313 MiB	1x32 KiB 2-way set associative

Graphics

This SoC has no integrated graphics processing unit.

Features

• Auto-power down state
• Stop clock state

Gallery

• 

  Week 30, 1998

Documents

DataSheet

• AMD-K6-2 Processor Data Sheet; Publication #21850 Revision J/0, February 2000