From WikiChip
K6-2/300AFR-66 - AMD
< amd‎ | k6-2
Revision as of 21:54, 3 August 2016 by ChipIt (talk | contribs)

Template:mpu K6-2/300AFR-66 was a 32-bit x86 K6-2-based microprocessor designed and manufactured in 1998 by AMD. Manufactured using a 0.25 µm process, this MPU operated at 300 MHz with a FSB of 66 MHz consumed 17.2 W. Note that this is an identical model to K6-2/300AFR with a multiplier of 4.5 instead of 3 designed to support a 66 MHz bus instead of 100 MHz.

Cache

Main article: K6-2 § Cache

L2$ can be 512 KB to 2 MB, depending on manufacturer and motherboard model. L2$ is off-chip.

Cache Info [Edit Values]
L1I$ 32 KB
"KB" is not declared as a valid unit of measurement for this property.
1x32 KB 2-way set associative
L1D$ 32 KB
"KB" is not declared as a valid unit of measurement for this property.
1x32 KB 2-way set associative

Graphics

This SoC has no integrated graphics processing unit.

Features

Template:mpu features

  • Auto-power down state
  • Stop clock state

Documents

DataSheet

Facts about "K6-2/300AFR-66 - AMD"
l1d$ description2-way set associative +
l1i$ description2-way set associative +