-
WikiChip
WikiChip
-
Architectures
Popular x86
-
Intel
- Client
- Server
- Big Cores
- Small Cores
-
AMD
Popular ARM
-
ARM
- Server
- Big
- Little
-
Cavium
-
Samsung
-
-
Chips
Popular Families
-
Ampere
-
Apple
-
Cavium
-
HiSilicon
-
MediaTek
-
NXP
-
Qualcomm
-
Renesas
-
Samsung
-
From WikiChip
Core i3-6120T - Intel
< intel | core i3
Revision as of 23:42, 18 May 2016 by 207.172.184.157 (talk)
Template:mpu
Core i3-6120T is a 64-bit dual-core low-end performance microprocessor set to be introduced by Intel in 2016.
Cache
- Main article: Skylake § Cache
Cache Info [Edit Values] | ||
L1I$ | 64 KB "KB" is not declared as a valid unit of measurement for this property. |
2x32 KB 8-way set associative (per core, write-back) |
L1D$ | 64 KB "KB" is not declared as a valid unit of measurement for this property. |
2x32 KB 8-way set associative (per core, write-back) |
L2$ | 512 KB "KB" is not declared as a valid unit of measurement for this property. |
2x256 KB 4-way set associative (per core, write-back) |
L3$ | 3 MB "MB" is not declared as a valid unit of measurement for this property. |
shared |
Expansions
Features
Facts about "Core i3-6120T - Intel"
l1d$ description | 8-way set associative + |
l1i$ description | 8-way set associative + |
l2$ description | 4-way set associative + |
l3$ description | shared + |