Template:mpu i486SX2-50 was a fourth-generation x86 microprocessor introduced by Intel in the early 1990s. This chip, which is based on the 80486 microarchitecture, had a clock doubler operating at 50 MHz, twice the bus speed. In contrast to the i486DX chips, the i486SX line had no functional FPU on-die.

Cache

Main article: 80486 § Cache

Cache Info [Edit Values]
L1$	8 KiB 8,192 B 0.00781 MiB	1x8 KiB 4-way set associative (unified, write-through policy)

Graphics

This chip had no integrated graphics processing unit.

Features

• System Management Mode (SMM)

Gallery

• 

  A80486SX2-50, S-Spec SX845

See also

• 80486 family