From WikiChip
Difference between revisions of "university of manchester/spinnaker"
< university of manchester

m
Line 19: Line 19:
 
|max cpus=1,036,800 (system)
 
|max cpus=1,036,800 (system)
 
|max memory=128 MiB (chip), 7 TiB (system)
 
|max memory=128 MiB (chip), 7 TiB (system)
−
|power=1.6 W
+
|power=1.6 W (chip), 90kW (system)
 
|neuron count=1,000,000,000
 
|neuron count=1,000,000,000
 
}}
 
}}

Revision as of 13:26, 18 May 2018

Template:SpiNNaker

Edit Values
SpiNNaker multicore SoC
General Info
DesignerAPT Advanced Processor Technologies Research Group
MarketServer
Introduction20th May, 2011 (launched)
General Specs
Frequency200 MHz
Neuromorphic Specs
Neurons1,000,000,000
Microarchitecture
ISAARMv9 (ARM)
MicroarchitectureARM968
Die102 mm²
10.386 mm × 9.786 mm
MCPYes (2 dies)
Cores18
Max Memory128 MiB (chip), 7 TiB (system)
Multiprocessing
Max SMP1,036,800 (system)-Way (Multiprocessor)
Electrical
Power dissipation1.6 W (chip), 90kW (system)


References

  • Furber et al. "Overview of the SpiNNaker System Architecture" IEEE Transactions On Computers, Vol. 62, No. 12, December 2013
Retrieved from "https://en.wikichip.org/w/index.php?title=university_of_manchester/spinnaker&oldid=77936"
Facts about "SpiNNaker - APT - The University of Manchester"
RDF feed
base frequency200 MHz (0.2 GHz, 200,000 kHz) +
core count18 +
designerAPT Advanced Processor Technologies Research Group +
die area102 mm² (0.158 in², 1.02 cm², 102,000,000 µm²) +
die count2 +
die length10.386 mm (1.039 cm, 0.409 in, 10,386 µm) +
die width9.786 mm (0.979 cm, 0.385 in, 9,786 µm) +
first launchedMay 20, 2011 +
full page nameuniversity of manchester/spinnaker +
instance ofneuromorphic chip +
is multi-chip packagetrue +
isaARMv9 +
isa familyARM +
ldateMay 20, 2011 +
market segmentServer +
microarchitectureARM968 +
nameSpiNNaker multicore SoC +
neuron count1,000,000,000 +
smp max ways1,036,800 (system) +