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Difference between revisions of "intel/cpuid"
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{{work-in-progress}}
 
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{| class="wikitable" style="text-align:center;"
+
{| class="wikitable"
 
! Microarchitecture !! Core !! Extended Family !! Family !! Extended Model !! Model
 
! Microarchitecture !! Core !! Extended Family !! Family !! Extended Model !! Model
 +
|-
 +
| colspan="7" style="text-align: center;" | <small>[[Big Cores]] (Client)</small>
 
|-
 
|-
 
| {{intel|Cannon Lake|l=arch}} || {{intel|Cannon Lake U|U|l=core}} || 0 || 0x6 || 0x6 || 0x6 || [[Family 6 Model 102]]
 
| {{intel|Cannon Lake|l=arch}} || {{intel|Cannon Lake U|U|l=core}} || 0 || 0x6 || 0x6 || 0x6 || [[Family 6 Model 102]]
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| {{intel|Kaby Lake Y|Y|l=core}}/{{intel|Kaby Lake U|U|l=core}} || 0 || 0x6 || 0x8 || 0xE || [[Family 6 Model 142]]
 
| {{intel|Kaby Lake Y|Y|l=core}}/{{intel|Kaby Lake U|U|l=core}} || 0 || 0x6 || 0x8 || 0xE || [[Family 6 Model 142]]
 
|-
 
|-
| rowspan="3" | {{intel|Skylake|l=arch}} || {{intel|Skylake X|X|l=core}}/{{intel|Skylake SP|SP|l=core}} || 0 || 0x6 || 0x5 || 0x5 || [[Family 6 Model 85]]
+
| rowspan="2" | {{intel|Skylake (Client)|l=arch}} || {{intel|Skylake DT|DT|l=core}}/{{intel|Skylake H|H|l=core}}/{{intel|Skylake S|S|l=core}} || 0 || 0x6 || 0x5 || 0xE || [[Family 6 Model 94]]
 +
|-
 +
| {{intel|Skylake Y|Y|l=core}}/{{intel|Skylake U|U|l=core}} || 0 || 0x6 || 0x4 || 0xE || [[Family 6 Model 78]]
 
|-
 
|-
| {{intel|Skylake DT|DT|l=core}}/{{intel|Skylake H|H|l=core}}/{{intel|Skylake S|S|l=core}} || 0 || 0x6 || 0x5 || 0xE || [[Family 6 Model 94]]
+
| {{intel|Sandy Bridge (Client)|l=arch}} || {{intel|Sandy Bridge M|M|l=core}} || 0 || 0x6 || 0x2 || 0xA || [[Family 6 Model 42]]
 
|-
 
|-
| {{intel|Skylake Y|Y|l=core}}/{{intel|Skylake U|U|l=core}} || 0 || 0x6 || 0x4 || 0xE || [[Family 6 Model 78]]
+
| colspan="7" style="text-align: center;" | <small>[[Big Cores]] (Server)</small>
 
|-
 
|-
| &nbsp;
+
| {{intel|Skylake (Server)|l=arch}} || {{intel|Skylake X|X|l=core}}/{{intel|Skylake SP|SP|l=core}} || 0 || 0x6 || 0x5 || 0x5 || [[Family 6 Model 85]]
 
|-
 
|-
| {{intel|Sandy Bridge|l=arch}} || {{intel|Sandy Bridge M|M|l=core}} || 0 || 0x6 || 0x2 || 0xA || [[Family 6 Model 42]]
+
| {{intel|Ivy Bridge (Server)|l=arch}} || {{intel|Ivy Bridge E|E|l=core}} || 0 || 0x6 || 0x3 || 0xE || [[Family 6 Model 62]]
 
|-
 
|-
| &nbsp;
+
| {{intel|Sandy Bridge (Server)|l=arch}} || {{intel|Sandy Bridge E|E|l=core}} || 0 || 0x6 || 0x2 || 0xD || [[Family 6 Model 45]]
 
|-
 
|-
| {{intel|Goldmont|l=arch}} || {{intel|Denverton|l=core}} || 0 || 0x6 || 0x5 || 0xF || [[Family 6 Model 95]]
+
| colspan="7" style="text-align: center;" | <small>[[Little Cores]]</small>
 
|-
 
|-
 
| {{intel|Goldmont Plus|l=arch}} || {{intel|Gemini Lake|l=core}} || 0 || 0x6 || 0x7 || 0xA || [[Family 6 Model 122]]
 
| {{intel|Goldmont Plus|l=arch}} || {{intel|Gemini Lake|l=core}} || 0 || 0x6 || 0x7 || 0xA || [[Family 6 Model 122]]
 
|-
 
|-
| &nbsp;
+
| rowspan="2" | {{intel|Goldmont|l=arch}} || {{intel|Denverton|l=core}} || 0 || 0x6 || 0x5 || 0xF || [[Family 6 Model 95]]
 +
|-
 +
| {{intel|Apollo Lake|l=core}} || 0 || 0x6 || 0x5 || 0xC || [[Family 6 Model 92]]
 
|-
 
|-
| {{intel|Knights Landing|l=arch}} || || 0 || 0x6 || 0x5 || 0x7 || [[Family 6 Model 87]]
+
| colspan="7" style="text-align: center;" | <small>{{intel|MIC Architecture}}</small>
 
|-
 
|-
 
| {{intel|Knights Mill|l=arch}} || || 0 || 0x6 || 0x8 || 0x5 || [[Family 6 Model 133]]
 
| {{intel|Knights Mill|l=arch}} || || 0 || 0x6 || 0x8 || 0x5 || [[Family 6 Model 133]]
 +
|-
 +
| {{intel|Knights Landing|l=arch}} || || 0 || 0x6 || 0x5 || 0x7 || [[Family 6 Model 87]]
 
|}
 
|}
  

Revision as of 21:01, 28 January 2018

Below is a list of Intel's CPUID broken down by their respective core names and microarchitecture:


Under construction icon-blue.svg This article is a work in progress!
Microarchitecture Core Extended Family Family Extended Model Model
Big Cores (Client)
Cannon Lake U 0 0x6 0x6 0x6 Family 6 Model 102
Coffee Lake S/H 0 0x6 0x9 0xE Family 6 Model 158
Kaby Lake DT/H/S/X 0 0x6 0x9 0xE Family 6 Model 158
Y/U 0 0x6 0x8 0xE Family 6 Model 142
Skylake (Client) DT/H/S 0 0x6 0x5 0xE Family 6 Model 94
Y/U 0 0x6 0x4 0xE Family 6 Model 78
Sandy Bridge (Client) M 0 0x6 0x2 0xA Family 6 Model 42
Big Cores (Server)
Skylake (Server) X/SP 0 0x6 0x5 0x5 Family 6 Model 85
Ivy Bridge (Server) E 0 0x6 0x3 0xE Family 6 Model 62
Sandy Bridge (Server) E 0 0x6 0x2 0xD Family 6 Model 45
Little Cores
Goldmont Plus Gemini Lake 0 0x6 0x7 0xA Family 6 Model 122
Goldmont Denverton 0 0x6 0x5 0xF Family 6 Model 95
Apollo Lake 0 0x6 0x5 0xC Family 6 Model 92
MIC Architecture
Knights Mill 0 0x6 0x8 0x5 Family 6 Model 133
Knights Landing 0 0x6 0x5 0x7 Family 6 Model 87


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