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Difference between revisions of "intel/xeon e5/e5-2620 v4"
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− | {{benchmark entry | + | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q2/cpu2017-20161026-00015.html|test_timestamp=2017-02-28 06:34:33-0500|chip_count=2|core_count=16|copies_count=32|vendor=H3C|system=H3C R4900 G2 (Intel Xeon E5-2620 v4, 2.10 GHz)|SPECrate2017_fp_base=76|SPECrate2017_fp_peak=77.7}} |
− | |type= | + | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q2/cpu2017-20161026-00016.html|test_timestamp=2016-12-10 07:53:08-0500|chip_count=2|core_count=16|copies_count=32|vendor=H3C|system=H3C R4900 G2 (Intel Xeon E5-2620 v4, 2.10 GHz)|SPECrate2017_int_base=53.5|SPECrate2017_int_peak=59.4}} |
− | |test_link=https://www.spec.org/cpu2017/results/res2017q2/cpu2017-20161026-00015.html | ||
− | |test_timestamp=2017-02-28 06:34:33-0500 | ||
− | |vendor=H3C | ||
− | |system=H3C R4900 G2 (Intel Xeon E5-2620 v4, 2.10 GHz) | ||
− | |SPECrate2017_fp_base=76 | ||
− | |SPECrate2017_fp_peak=77.7 | ||
− | }} | ||
− | {{benchmark entry | ||
− | |type= | ||
− | |test_link=https://www.spec.org/cpu2017/results/res2017q2/cpu2017-20161026-00016.html | ||
− | |test_timestamp=2016-12-10 07:53:08-0500 | ||
− | |vendor=H3C | ||
− | |system=H3C R4900 G2 (Intel Xeon E5-2620 v4, 2.10 GHz) | ||
− | |SPECrate2017_int_base=53.5 | ||
− | |SPECrate2017_int_peak=59.4 | ||
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Revision as of 02:14, 26 November 2017
Template:mpu The Xeon E5-2620 v4 is a 64-bit octa-core x86 microprocessor introduced by Intel in 2016. This server MPU is designed for standard 2S environments (1U square form factor). Operating at 2.1 GHz with a turbo boost frequency of 3 GHz for a single active core, this MPU has a TDP of 85 W and is manufactured on a 14 nm process (based on Broadwell).
Cache
- Main article: Broadwell § Cache
Cache Info [Edit Values] | ||
L1I$ | 256 KiB 262,144 B 0.25 MiB |
8x32 KiB 8-way set associative (per core, write-back) |
L1D$ | 256 KiB 262,144 B 0.25 MiB |
8x32 KiB 8-way set associative (per core, write-back) |
L2$ | 2 MiB 2,048 KiB 2,097,152 B 0.00195 GiB |
8x256 KiB 8-way set associative (per core, write-back) |
L3$ | 20 MiB 20,480 KiB 20,971,520 B 0.0195 GiB |
8x2.5 MiB 20-way set associative (shared, per core, write-back) |
Graphics
This microprocessor has no integrated graphics processing unit.
Memory controller
Integrated Memory Controller | |
Type | DDR4-2133 |
Controllers | 1 |
Channels | 4 |
ECC Support | Yes |
Max bandwidth | 63.58 GiB/s |
Bandwidth (single) | 15.89 GiB/s |
Bandwidth (dual) | 31.79 GiB/s |
Max memory | 1,536 GiB |
Physical Address Extensions | 46 bit |
Expansions
Features
Benchmarks
Test: SPEC CPU2017
Tested: 2017-02-28 06:34:33-0500
Chips: 2, Cores: 16, Copies: 32
Tested: 2017-02-28 06:34:33-0500
Chips: 2, Cores: 16, Copies: 32
Vendor: H3C
System: H3C R4900 G2 (Intel Xeon E5-2620 v4, 2.10 GHz)
System: H3C R4900 G2 (Intel Xeon E5-2620 v4, 2.10 GHz)
SPECrate2017_fp_base: 76
SPECrate2017_fp_peak: 77.7
Test: SPEC CPU2017
Tested: 2016-12-10 07:53:08-0500
Chips: 2, Cores: 16, Copies: 32
Tested: 2016-12-10 07:53:08-0500
Chips: 2, Cores: 16, Copies: 32
Vendor: H3C
System: H3C R4900 G2 (Intel Xeon E5-2620 v4, 2.10 GHz)
System: H3C R4900 G2 (Intel Xeon E5-2620 v4, 2.10 GHz)
SPECrate2017_int_base: 53.5
SPECrate2017_int_peak: 59.4
Facts about "Xeon E5-2620 v4 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon E5-2620 v4 - Intel + and Xeon E5-2620 v4 - Intel + |
l1d$ description | 8-way set associative + |
l1d$ size | 256 KiB (262,144 B, 0.25 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 256 KiB (262,144 B, 0.25 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) + |
l3$ description | 20-way set associative + |
l3$ size | 20 MiB (20,480 KiB, 20,971,520 B, 0.0195 GiB) + |