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Difference between revisions of "mediatek/helio/p30"
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− | '''Helio P30''' is a mid-range performance {{arch|64}} [[octa-core]] [[ARM]] [[LTE]] system on a chip designed by [[MediaTek]] set to launch in late [[2017]]. This SoC, which is fabricated on [[TSMC]]'s [[16 nm process]], incorporates eight {{armh|Cortex-A53|l=arch}} cores with four [[little cores]] operating at up to 1.65 GHz and four [[big cores]] operating at up to 2.3 GHz. The Helio | + | '''Helio P30''' is a mid-range performance {{arch|64}} [[octa-core]] [[ARM]] [[LTE]] system on a chip designed by [[MediaTek]] set to launch in late [[2017]]. This SoC, which is fabricated on [[TSMC]]'s [[16 nm process]], incorporates eight {{armh|Cortex-A53|l=arch}} cores with four [[little cores]] operating at up to 1.65 GHz and four [[big cores]] operating at up to 2.3 GHz. The Helio P30 supports up to 6 GiB of dual-channel LPDDR4X-3200 memory and incorporates a modem supporting [[LTE]] User Equipment (UE) category 7 (DL)/13 (UL). |
{{unknown features}} | {{unknown features}} |
Revision as of 14:31, 10 September 2017
Template:mpu Helio P30 is a mid-range performance 64-bit octa-core ARM LTE system on a chip designed by MediaTek set to launch in late 2017. This SoC, which is fabricated on TSMC's 16 nm process, incorporates eight Cortex-A53 cores with four little cores operating at up to 1.65 GHz and four big cores operating at up to 2.3 GHz. The Helio P30 supports up to 6 GiB of dual-channel LPDDR4X-3200 memory and incorporates a modem supporting LTE User Equipment (UE) category 7 (DL)/13 (UL).