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{{amd title|Ryzen 7 1700}} | {{amd title|Ryzen 7 1700}} | ||
{{mpu | {{mpu | ||
− | | name | + | |name=AMD Ryzen 7 1700 |
− | | image | + | |image=ryzen 7 1700.svg |
− | | image size | + | |image size=250px |
− | + | |designer=AMD | |
− | | designer | + | |manufacturer=GlobalFoundries |
− | | manufacturer | + | |model number=1700 |
− | | model number | + | |part number=YD1700BBAEBOX |
− | | part number | + | |part number 2=YD1700BBM88AE |
− | | part number 2 | + | |market=Desktop |
− | | market | + | |first announced=February 22, 2017 |
− | | first announced | + | |first launched=March 2, 2017 |
− | | first launched | + | |release price=$329 |
− | + | |family=Ryzen 7 | |
− | + | |series=Ryzen | |
− | | release price | + | |locked=No |
− | + | |frequency=3,000 MHz | |
− | | family | + | |turbo frequency1=3,700 MHz |
− | | series | + | |turbo frequency2=3,700 MHz |
− | | locked | + | |bus links=4 |
− | | frequency | + | |bus rate=8 GT/s |
− | + | |clock multiplier=30 | |
− | | turbo frequency1 | + | |cpuid=800F11 |
− | | turbo frequency2 | + | |isa=x86-64 |
− | + | |isa family=x86 | |
− | + | |microarch=Zen | |
− | + | |chipset=Promontory | |
− | + | |core name=Summit Ridge | |
− | + | |core family=23 | |
− | + | |core model=1 | |
− | | bus | + | |core stepping=1 |
− | + | |process=14 nm | |
− | | bus rate | + | |transistors=4,800,000,000 |
− | + | |technology=CMOS | |
− | | clock multiplier | + | |die area=195.228 mm² |
− | | cpuid | + | |die length=8.87 mm |
− | + | |die width=22.01 mm | |
− | + | |word size=64 bit | |
− | | isa | + | |core count=8 |
− | | isa | + | |thread count=16 |
− | | microarch | + | |max cpus=1 |
− | + | |max memory=64 GiB | |
− | | chipset | + | |tdp=65 W |
− | | core name | + | |package module 1={{packages/amd/socket am4}} |
− | | core family | + | |turbo frequency=Yes |
− | | core model | ||
− | | core stepping | ||
− | | process | ||
− | | transistors | ||
− | | technology | ||
− | | die area | ||
− | | die | ||
− | | die | ||
− | | word size | ||
− | | core count | ||
− | | thread count | ||
− | | max cpus | ||
− | | max memory | ||
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− | | package module 1 | ||
}} | }} | ||
'''Ryzen 7 1700''' is a {{arch|64}} [[octa-core]] high-end performance [[x86]] desktop microprocessor introduced by [[AMD]] in early [[2017]]. This processor is based on AMD's {{amd|Zen|Zen microarchitecture|l=arch}} and is fabricated on a [[14 nm process]]. The 1700 operates at a base frequency of 3 GHz with a [[TDP]] of 65 W and a {{amd|Precision Boost|Boost}} frequency of 3.7 GHz. This MPU supports up to 64 GiB of dual-channel DDR4-2666 ECC memory. | '''Ryzen 7 1700''' is a {{arch|64}} [[octa-core]] high-end performance [[x86]] desktop microprocessor introduced by [[AMD]] in early [[2017]]. This processor is based on AMD's {{amd|Zen|Zen microarchitecture|l=arch}} and is fabricated on a [[14 nm process]]. The 1700 operates at a base frequency of 3 GHz with a [[TDP]] of 65 W and a {{amd|Precision Boost|Boost}} frequency of 3.7 GHz. This MPU supports up to 64 GiB of dual-channel DDR4-2666 ECC memory. |
Revision as of 11:04, 27 July 2017
Template:mpu Ryzen 7 1700 is a 64-bit octa-core high-end performance x86 desktop microprocessor introduced by AMD in early 2017. This processor is based on AMD's Zen microarchitecture and is fabricated on a 14 nm process. The 1700 operates at a base frequency of 3 GHz with a TDP of 65 W and a Boost frequency of 3.7 GHz. This MPU supports up to 64 GiB of dual-channel DDR4-2666 ECC memory.
Cache
- Main article: Zen § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller
This processor incorporates 2 DDR4 PHYs, each supporting 1 channel of 64-bit data plus ECC with 2 DIMMs per channel. DIMMs of rates 1,333 MT/s - 3,200 MT/s are supported (UDIMM/SODIMM). Note that despite AMD's support for memory rates of 3,200 MT/s and possibly higher, rates beyond 2666 MT/s exceeds the JEDEC specification and is thus considered overclocking which voids AMD product warranty and likely any vendor or retailer warranties as well.
Integrated Memory Controller
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[Edit] Memory Configurations | |||
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Dual Channel | Single Rank | 2 DIMMs | DDR4-2666 |
4 DIMMs | DDR4-2133 | ||
Double Rank | 2 DIMMs | DDR4-2400 | |
4 DIMMs | DDR4-1866 |
Expansions
The Ryzen 7 1700 includes 20 PCIe lanes supporting Gen1, Gen2, and Gen3: 16 for a DGP and 4 for storage (NVMe or 2 ports SATA Express). PHY of 16 lanes may each have a maximum of 8 PCIe ports (x1, x2, x4, x8, x16).
Expansion Options
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- eMMC, LPC, SMBus, SPI/eSPI
Audio
Support Azalia High Definition Audio
Graphics
This processor has no integrated graphics.
Features
[Edit/Modify Supported Features]
Supported x86 Extensions & Processor Features
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- This model has partial XFR support, allowing for an additional +50 MHz boost frequency.
Die Shot
- See also: Zen § Die Shot
- 14 nm process
- 12 metal layers
- 2,000 meters of signals
- 4,800,000,000 transistors
- 22.01 mm x 8.87 mm
- ~195.228 mm²
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Ryzen 7 1700 - AMD#io + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has amd amd-v technology | true + |
has amd amd-vi technology | true + |
has amd sensemi technology | true + |
has ecc memory support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension + and SenseMI Technology + |
has simultaneous multithreading | true + |
has x86 advanced encryption standard instruction set extension | true + |
l1$ size | 768 KiB (786,432 B, 0.75 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 256 KiB (262,144 B, 0.25 MiB) + |
l1i$ description | 4-way set associative + |
l1i$ size | 512 KiB (524,288 B, 0.5 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) + |
l3$ description | 16-way set associative + |
l3$ size | 16 MiB (16,384 KiB, 16,777,216 B, 0.0156 GiB) + |
max memory bandwidth | 39.74 GiB/s (40,693.76 MiB/s, 42.671 GB/s, 42,670.5 MB/s, 0.0388 TiB/s, 0.0427 TB/s) + |
max memory channels | 2 + |
max pcie lanes | 20 + |
supported memory type | DDR4-2666 + |