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Difference between revisions of "intel/core i3/i3-6100"
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(→‎Cache)
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|name=Core i3-6100
 
|name=Core i3-6100
 
|no image=Yes
 
|no image=Yes
 +
|image=skylake (fclga1151).png
 
|designer=Intel
 
|designer=Intel
 
|manufacturer=Intel
 
|manufacturer=Intel
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|frequency=3,700 MHz
 
|frequency=3,700 MHz
 
|bus type=DMI 3.0
 
|bus type=DMI 3.0
 +
|bus links=4
 
|bus rate=8 GT/s
 
|bus rate=8 GT/s
 
|clock multiplier=37
 
|clock multiplier=37
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|isa family=x86
 
|isa family=x86
 
|microarch=Skylake
 
|microarch=Skylake
 +
|chipset=Sunrise Point
 
|core name=Skylake S
 
|core name=Skylake S
 
|core family=6
 
|core family=6
 +
|core model=94
 
|core stepping=S0
 
|core stepping=S0
 
|process=14 nm
 
|process=14 nm
 
|technology=CMOS
 
|technology=CMOS
 +
|die area=98.57 mm²
 +
|die length=10.3 mm
 +
|die width=9.57 mm
 
|word size=64 bit
 
|word size=64 bit
 
|core count=2
 
|core count=2
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|max cpus=1
 
|max cpus=1
 
|max memory=64 GiB
 
|max memory=64 GiB
 +
|v core min=0.55 V
 +
|v core max=1.52 V
 
|tdp=51 W
 
|tdp=51 W
 
|temp min=0 °C
 
|temp min=0 °C
 
|temp max=100 °C
 
|temp max=100 °C
 +
|tjunc min=0 °C
 +
|tjunc max=100 °C
 +
|tstorage min=-25 °C
 +
|tstorage max=125 °C
 
|package module 1={{packages/intel/fclga-1151}}
 
|package module 1={{packages/intel/fclga-1151}}
 
}}
 
}}

Revision as of 07:58, 8 July 2017

Template:mpu Core i3-6100 is a 64-bit dual-core low-end desktop performance microprocessor introduced by Intel late 2015. This processor, which is based on the Skylake microarchitecture and manufactured in 14 nm process, has a base frequency of 3.7 GHz with a TDP of 51 W. This processor incorporates the HD Graphics 530 GPU clocked at 350 MHz with a max frequency of 1.05 GHz.

Cache

Main article: Skylake § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$128 KiB
131,072 B
0.125 MiB
L1I$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associative 
L1D$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associativewrite-back
L2$512 KiB
0.5 MiB
524,288 B
4.882812e-4 GiB
  2x256 KiB4-way set associativewrite-back
L3$3 MiB
3,072 KiB
3,145,728 B
0.00293 GiB
  2x1.5 MiB write-back

Graphics

Integrated Graphic Information
GPU Intel HD Graphics 530
Device ID 0x1912
Displays 3
Frequency 350 MHz
0.35 GHz
350,000 KHz
Max frequency 1.05 GHz
1,050 MHz
1,050,000 KHz
Max memory 64 GiB
65,536 MiB
67,108,864 KiB
68,719,476,736 B
Output DisplayPort, Embedded DisplayPort, HDMI, DVI
DirectX 12
OpenGL 4.4
OpenCL 2.0
HDMI 1.4a
DP 1.2
eDP 1.3
Max HDMI Res 4096x2304 @24 Hz
Max DP Res 4096x2304 @60 Hz
Max eDP Res 4096x2304 @60 Hz
Intel Quick Sync Video
Intel InTru 3D
Intel Insider
Intel WiDi (Wireless Display)
Intel Clear Video

Memory controller

Integrated Memory Controller
Type DDR3L-1333, DDR3L-1600, DDR4-1866, DDR4-2133
Controllers 1
Channels 2
ECC Support Yes
Max bandwidth 34.1 GB/s
Max memory 64 GiB

Expansions

Template:mpu expansions

Features

Template:mpu features

Retrieved from "https://en.wikichip.org/w/index.php?title=intel/core_i3/i3-6100&oldid=53219"
Facts about "Core i3-6100 - Intel"
RDF feed
device id0x1912 +
has featureintegrated gpu +
integrated gpuIntel HD Graphics 530 +
integrated gpu base frequency350 MHz (0.35 GHz, 350,000 KHz) +
integrated gpu max frequency1,050 MHz (1.05 GHz, 1,050,000 KHz) +
integrated gpu max memory65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB) +
l1$ size128 KiB (131,072 B, 0.125 MiB) +
l1d$ description8-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description8-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description4-way set associative +
l2$ size0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l3$ size3 MiB (3,072 KiB, 3,145,728 B, 0.00293 GiB) +