From WikiChip
Difference between revisions of "intel/xeon e3/e3-1565l v5"
< intel

Line 2: Line 2:
 
{{mpu
 
{{mpu
 
|name=Xeon E3-1565L v5
 
|name=Xeon E3-1565L v5
−
|image=skylake h (front).png
+
|no image=Yes
 
|designer=Intel
 
|designer=Intel
 
|manufacturer=Intel
 
|manufacturer=Intel

Revision as of 00:02, 8 July 2017

Template:mpu

Cache

Main article: Skylake § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$256 KiB
262,144 B
0.25 MiB
L1I$128 KiB
131,072 B
0.125 MiB
4x32 KiB8-way set associative 
L1D$128 KiB
131,072 B
0.125 MiB
4x32 KiB8-way set associativewrite-back
L2$1 MiB
1,024 KiB
1,048,576 B
9.765625e-4 GiB
  4x256 KiB4-way set associativewrite-back
L3$8 MiB
8,192 KiB
8,388,608 B
0.00781 GiB
  4x2 MiB write-back
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/xeon_e3/e3-1565l_v5&oldid=52961"
Facts about "Xeon E3-1565L v5 - Intel"
RDF feed
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Xeon E3-1565L v5 - Intel#package + and Xeon E3-1565L v5 - Intel#io +
base frequency2,500 MHz (2.5 GHz, 2,500,000 kHz) +
bus links4 +
bus rate8,000 MT/s (8 GT/s, 8,000,000 kT/s) +
bus typeDMI 3.0 +
clock multiplier25 +
core count4 +
core family6 +
core model94 +
core nameSkylake H +
core steppingN0 +
core voltage (max)1.52 V (15.2 dV, 152 cV, 1,520 mV) +
core voltage (min)0.55 V (5.5 dV, 55 cV, 550 mV) +
designerIntel +
device id0x193D +
die count2 +
familyXeon E3 +
first announcedMay 31, 2016 +
first launchedMay 31, 2016 +
full page nameintel/xeon e3/e3-1565l v5 +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has ecc memory supporttrue +
has extended page tables supporttrue +
has featureAdvanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Enhanced SpeedStep Technology +, Intel VT-x +, Intel VT-d +, OS Guard +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Trusted Execution Technology +, Intel vPro Technology +, Transactional Synchronization Extensions +, Secure Key Technology +, Extended Page Tables +, Software Guard Extensions + and Memory Protection Extensions +
has intel enhanced speedstep technologytrue +
has intel secure key technologytrue +
has intel supervisor mode execution protectiontrue +
has intel trusted execution technologytrue +
has intel turbo boost technology 2 0true +
has intel vpro technologytrue +
has intel vt-d technologytrue +
has intel vt-x technologytrue +
has locked clock multipliertrue +
has second level address translation supporttrue +
has simultaneous multithreadingtrue +
has transactional synchronization extensionstrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
integrated gpuIris Pro Graphics P580 +
integrated gpu base frequency350 MHz (0.35 GHz, 350,000 KHz) +
integrated gpu designerIntel +
integrated gpu execution units72 +
integrated gpu max frequency1,050 MHz (1.05 GHz, 1,050,000 KHz) +
integrated gpu max memory65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB) +
is multi-chip packagetrue +
isax86-64 +
isa familyx86 +
l1$ size256 KiB (262,144 B, 0.25 MiB) +
l1d$ description8-way set associative +
l1d$ size128 KiB (131,072 B, 0.125 MiB) +
l1i$ description8-way set associative +
l1i$ size128 KiB (131,072 B, 0.125 MiB) +
l2$ description4-way set associative +
l2$ size1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
l3$ size8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) +
l4$ size128 MiB (131,072 KiB, 134,217,728 B, 0.125 GiB) +
ldateMay 31, 2016 +
manufacturerIntel +
market segmentServer +
max cpu count1 +
max junction temperature373.15 K (100 °C, 212 °F, 671.67 °R) +
max memory65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB, 0.0625 TiB) +
max memory bandwidth31.79 GiB/s (32,552.96 MiB/s, 34.134 GB/s, 34,134.253 MB/s, 0.031 TiB/s, 0.0341 TB/s) +
max memory channels2 +
max pcie lanes16 +
max storage temperature398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitectureSkylake +
min junction temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature248.15 K (-25 °C, -13 °F, 446.67 °R) +
model numberE3-1565L v5 +
nameXeon E3-1565L v5 +
packageFCBGA-1440 +
process14 nm (0.014 μm, 1.4e-5 mm) +
release price$ 417.00 (€ 375.30, £ 337.77, ¥ 43,088.61) +
s-specSR2R8 +
seriesE3-1500 v5 +
smp max ways1 +
supported memory typeLPDDR3-1866 +, DDR3L-1600 + and DDR4-2133 +
tdp35 W (35,000 mW, 0.0469 hp, 0.035 kW) +
technologyCMOS +
thread count8 +
turbo frequency (1 core)3,500 MHz (3.5 GHz, 3,500,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +
x86/has memory protection extensionstrue +
x86/has software guard extensionstrue +