From WikiChip
Difference between revisions of "intel/core i5/i5-6402p"
< intel‎ | core i5

Line 34: Line 34:
  
  
{{stub}}
+
 
 +
== Cache ==
 +
{{main|intel/microarchitectures/skylake#Memory_Hierarchy|l1=Skylake § Cache}}
 +
{{cache size
 +
|l1 cache=256 KiB
 +
|l1i cache=128 KiB
 +
|l1i break=4x32 KiB
 +
|l1i desc=8-way set associative
 +
|l1d cache=128 KiB
 +
|l1d break=4x32 KiB
 +
|l1d desc=8-way set associative
 +
|l1d policy=write-back
 +
|l2 cache=1 MiB
 +
|l2 break=4x256 KiB
 +
|l2 desc=4-way set associative
 +
|l2 policy=write-back
 +
|l3 cache=6 MiB
 +
|l3 break=4x1.5 MiB
 +
|l3 policy=write-back
 +
}}

Revision as of 02:09, 7 July 2017

Template:mpu The Intel Core i5-6402P is a quad core 64-bit desktop microprocessor set to release by Intel in 2016. The microprocessor is based on the Skylake microarchitecture using 14nm process.

DIL16 Blank.svg Preliminary Data! Information presented in this article deal with a microprocessor or chip that was recently announced or leaked, thus missing information regarding its features and exact specification. Information may be incomplete and can change by final release.


Cache

Main article: Skylake § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$256 KiB
262,144 B
0.25 MiB
L1I$128 KiB
131,072 B
0.125 MiB
4x32 KiB8-way set associative 
L1D$128 KiB
131,072 B
0.125 MiB
4x32 KiB8-way set associativewrite-back

L2$1 MiB
1,024 KiB
1,048,576 B
9.765625e-4 GiB
  4x256 KiB4-way set associativewrite-back

L3$6 MiB
6,144 KiB
6,291,456 B
0.00586 GiB
  4x1.5 MiB write-back
Facts about "Core i5-6402P - Intel"
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Core i5-6402P - Intel#package + and Core i5-6402P - Intel#io +
base frequency2,800 MHz (2.8 GHz, 2,800,000 kHz) +
bus links4 +
bus rate8,000 MT/s (8 GT/s, 8,000,000 kT/s) +
bus typeDMI 3.0 +
chipsetSunrise Point +
clock multiplier28 +
core count4 +
core family6 +
core model94 +
core nameSkylake S +
core steppingR0 +
core voltage (max)1.52 V (15.2 dV, 152 cV, 1,520 mV) +
core voltage (min)0.55 V (5.5 dV, 55 cV, 550 mV) +
designerIntel +
device id0x1902 +
die area122 mm² (0.189 in², 1.22 cm², 122,000,000 µm²) +
familyCore i5 +
first announcedDecember 27, 2015 +
first launchedDecember 27, 2015 +
full page nameintel/core i5/i5-6402p +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has ecc memory supportfalse +
has extended page tables supporttrue +
has featureAdvanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Enhanced SpeedStep Technology +, Intel VT-x +, Intel VT-d +, Secure Key Technology +, Turbo Boost Technology 2.0 +, OS Guard +, Identity Protection Technology +, Extended Page Tables +, Memory Protection Extensions + and Software Guard Extensions +
has intel enhanced speedstep technologytrue +
has intel identity protection technology supporttrue +
has intel secure key technologytrue +
has intel supervisor mode execution protectiontrue +
has intel turbo boost technology 2 0true +
has intel vt-d technologytrue +
has intel vt-x technologytrue +
has locked clock multipliertrue +
has second level address translation supporttrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
integrated gpuHD Graphics 510 +
integrated gpu base frequency350 MHz (0.35 GHz, 350,000 KHz) +
integrated gpu designerIntel +
integrated gpu execution units12 +
integrated gpu max frequency950 MHz (0.95 GHz, 950,000 KHz) +
integrated gpu max memory65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB) +
isax86-64 +
isa familyx86 +
l1$ size256 KiB (262,144 B, 0.25 MiB) +
l1d$ description8-way set associative +
l1d$ size128 KiB (131,072 B, 0.125 MiB) +
l1i$ description8-way set associative +
l1i$ size128 KiB (131,072 B, 0.125 MiB) +
l2$ description4-way set associative +
l2$ size1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
l3$ size6 MiB (6,144 KiB, 6,291,456 B, 0.00586 GiB) +
last orderMarch 30, 2018 +
last shipmentSeptember 7, 2018 +
ldateDecember 27, 2015 +
main imageFile:skylake (fclga1151).png +
manufacturerIntel +
market segmentDesktop +
max cpu count1 +
max junction temperature373.15 K (100 °C, 212 °F, 671.67 °R) +
max memory65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB, 0.0625 TiB) +
max memory bandwidth31.79 GiB/s (32,552.96 MiB/s, 34.134 GB/s, 34,134.253 MB/s, 0.031 TiB/s, 0.0341 TB/s) +
max memory channels2 +
max operating temperature100 C +
max pcie lanes16 +
max storage temperature398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitectureSkylake +
min junction temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature248.15 K (-25 °C, -13 °F, 446.67 °R) +
model numberi5-6402P +
nameCore i5-6402P +
packageFCLGA-1151 +
part numberBX80662I56402P +, BXC80662I56402P + and CM8066201920509 +
process14 nm (0.014 μm, 1.4e-5 mm) +
release price$ 187.00 (€ 168.30, £ 151.47, ¥ 19,322.71) +
s-specSR2NJ +
seriesi5-6000 +
smp max ways1 +
socketLGA-1151 +
supported memory typeDDR3L-1600 + and DDR4-2133 +
tdp65 W (65,000 mW, 0.0872 hp, 0.065 kW) +
technologyCMOS +
thread count4 +
turbo frequency (1 core)3,400 MHz (3.4 GHz, 3,400,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +
x86/has memory protection extensionstrue +
x86/has software guard extensionstrue +