From WikiChip
Difference between revisions of "intel/xeon e3/e3-1565l v5"
< intel

Line 6: Line 6:
 
|manufacturer=Intel
 
|manufacturer=Intel
 
|model number=E3-1565L v5
 
|model number=E3-1565L v5
 +
|s-spec=SR2R8
 
|family=Xeon E3
 
|family=Xeon E3
 
|series=E3-1500 v5
 
|series=E3-1500 v5
 
|locked=Yes
 
|locked=Yes
 +
|frequency=2,500 MHz
 +
|turbo frequency1=3,500 MHz
 
|isa=x86-64
 
|isa=x86-64
 
|isa family=x86
 
|isa family=x86
Line 15: Line 18:
 
|core family=6
 
|core family=6
 
|core model=94
 
|core model=94
 +
|core stepping=N0
 
|process=14 nm
 
|process=14 nm
 
|technology=CMOS
 
|technology=CMOS
 
|word size=64 bit
 
|word size=64 bit
 +
|core count=4
 +
|thread count=8
 +
|max cpus=1
 +
|tdp=35 W
 
|package module 1={{packages/intel/fcbga-1440}}
 
|package module 1={{packages/intel/fcbga-1440}}
 
}}
 
}}

Revision as of 00:48, 6 July 2017

Template:mpu

l1$ size256 KiB (262,144 B, 0.25 MiB) +
l1d$ description8-way set associative +
l1d$ size128 KiB (131,072 B, 0.125 MiB) +
l1i$ description8-way set associative +
l1i$ size128 KiB (131,072 B, 0.125 MiB) +
l2$ description4-way set associative +
l2$ size1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
l3$ size8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) +