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Difference between revisions of "intel/core i7/i7-6500u"
< intel‎ | core i7

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{{intel title|Core i7-6500U}}
 
{{intel title|Core i7-6500U}}
−
{{mpu}}
+
{{mpu
 +
|name=Core i7-6500U
 +
|image=skylake (bga1356).png
 +
|designer=Intel
 +
|manufacturer=Intel
 +
|model number=i7-6500U
 +
|s-spec=SR2EZ
 +
|market=Mobile
 +
|family=Core i5
 +
|series=i5-6000
 +
|locked=Yes
 +
|frequency=2,500 MHz
 +
|turbo frequency1=3,100 MHz
 +
|bus type=OPI
 +
|bus rate=4 GT/s
 +
|clock multiplier=25
 +
|isa=x86-64
 +
|isa family=x86
 +
|microarch=Skylake
 +
|core name=Skylake U
 +
|core family=6
 +
|core model=78
 +
|core stepping=D1
 +
|process=14 nm
 +
|transistors=1,750,000,000
 +
|technology=CMOS
 +
|die area=98.57 mm²
 +
|die length=10.3 mm
 +
|die width=9.57 mm
 +
|mcp=Yes
 +
|die count=2
 +
|word size=64 bit
 +
|core count=2
 +
|thread count=4
 +
|max cpus=1
 +
|max memory=32 GiB
 +
|tdp=15 W
 +
|ctdp down=7.5 W
 +
|ctdp down frequency=800 MHz
 +
|ctdp up=25 W
 +
|ctdp up frequency=2,600 MHz
 +
|tjunc min=0 °C
 +
|tjunc max=100 °C
 +
|tstorage min=-25 °C
 +
|tstorage max=125 °C
 +
|package module 1={{packages/intel/fcbga-1356}}
 +
}}

Revision as of 16:37, 3 July 2017

Template:mpu

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