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Difference between revisions of "intel/core m/m5-6y54"
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{{intel title|Core M5-6Y54}}
 
{{intel title|Core M5-6Y54}}
 
{{mpu
 
{{mpu
−
| name               = Core M5-6Y54
+
|name=Core M5-6Y54
−
| no image           =
+
|image=skylake y (front).png
−
| image              = skylake y (front).png
+
|image size=250px
−
| image size         = 250px
+
|designer=Intel
−
| caption            =
+
|manufacturer=Intel
−
| designer           = Intel
+
|model number=M5-6Y54
−
| manufacturer       = Intel
+
|part number=HE8066201930524
−
| model number       = M5-6Y54
+
|s-spec=SR2EM
−
| part number         = HE8066201930524
+
|market=Mobile
−
| market              = Mobile
+
|first launched=September 1, 2015
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| first announced    =  
+
|release price=$281
−
| first launched     = September 1, 2015
+
|family=Core M5
−
| last order          =
+
|series=6000
−
| last shipment      =
+
|locked=Yes
−
| release price       = $281
+
|frequency=1100 MHz
−
 
+
|turbo frequency1=2700 MHz
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| family             = Core M5
+
|bus type=DMI 3.0
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| series             = 6000
+
|clock multiplier=11
−
| locked             = Yes
+
|isa=x86-64
−
| frequency           = 1100 MHz
+
|isa family=x86
−
| turbo frequency    = Yes
+
|microarch=Skylake
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| turbo frequency1   = 2700 MHz
+
|platform=Skylake
−
| turbo frequency2    =
+
|core name=Skylake Y
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| bus type           = DMI 3.0
+
|core family=6
−
| bus speed          =
+
|core model=78
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| bus rate            =
+
|core stepping=D1
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| clock multiplier   = 11
+
|process=14 nm
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| s-spec              = SR2EM
+
|transistors=1,750,000,000
−
| s-spec es          =
+
|technology=CMOS
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| s-spec qs          =
+
|die area=98.57 mm²
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| cpuid              =
+
|die length=10.3 mm
−
 
+
|die width=9.57 mm
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| isa family         = x86
+
|mcp=Yes
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| isa                = x86-64
+
|die count=2
−
| microarch           = Skylake
+
|word size=64 bit
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| platform           = Skylake
+
|core count=2
−
| chipset            =
+
|thread count=4
−
| core name           = Skylake Y
+
|max cpus=1
−
| core family         =  
+
|max memory=16 GiB
−
| core model         =  
+
|sdp=3 W
−
| core stepping       = D1
+
|tdp=4.5 W
−
| process             = 14 nm
+
|ctdp down=3.5 W
−
| transistors         = 1,750,000,000
+
|ctdp down frequency=600 MHz
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| technology         = CMOS
+
|ctdp up=7 W
−
| die area           = 98.57 mm²
+
|ctdp up frequency=1500 MHz
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| die width           = 9.57 mm
+
|tjunc min=5 °C
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| die length          = 10.3 mm
+
|tjunc max=100 °C
−
| word size           = 64 bit
+
|package module 1={{packages/intel/fcbga-1515}}
−
| core count         = 2
+
|turbo frequency=Yes
−
| thread count       = 4
 
−
| max cpus           = 1
 
−
| max memory         = 16 GiB
 
−
 
 
−
 
 
−
| v core              =
 
−
| v core tolerance    =
 
−
| sdp                 = 3 W
 
−
| tdp                 = 4.5 W
 
−
| ctdp down           = 3.5 W
 
−
| ctdp down frequency = 600 MHz
 
−
| ctdp up             = 7 W
 
−
| ctdp up frequency   = 1500 MHz
 
−
| tjunc min           = 5 °C
 
−
| tjunc max           = 100 °C
 
−
 
 
−
| package module 1 = {{packages/intel/fcbga-1515}}
 
 
}}
 
}}
 
'''Core M5-6Y54''' is an ultra-low power {{arch|64}} [[dual-core]] [[x86]] microprocessor introduced by [[Intel]] in late 2015. This MPU operates at 1.1 GHz with a max turbo frequency of 2.7 GHz. This chip, which is manufactured on a [[14 nm process]], is based on the {{intel|Skylake}} microarchitecture. The Core M5-6Y54 incorporates Intel's {{intel|HD Graphics 515}} Gen9 GPU clocked at 300 MHz with turbo frequency of 900 MHz.
 
'''Core M5-6Y54''' is an ultra-low power {{arch|64}} [[dual-core]] [[x86]] microprocessor introduced by [[Intel]] in late 2015. This MPU operates at 1.1 GHz with a max turbo frequency of 2.7 GHz. This chip, which is manufactured on a [[14 nm process]], is based on the {{intel|Skylake}} microarchitecture. The Core M5-6Y54 incorporates Intel's {{intel|HD Graphics 515}} Gen9 GPU clocked at 300 MHz with turbo frequency of 900 MHz.

Revision as of 12:14, 3 July 2017

Template:mpu Core M5-6Y54 is an ultra-low power 64-bit dual-core x86 microprocessor introduced by Intel in late 2015. This MPU operates at 1.1 GHz with a max turbo frequency of 2.7 GHz. This chip, which is manufactured on a 14 nm process, is based on the Skylake microarchitecture. The Core M5-6Y54 incorporates Intel's HD Graphics 515 Gen9 GPU clocked at 300 MHz with turbo frequency of 900 MHz.

Cache

Main article: Skylake § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$128 KiB
131,072 B
0.125 MiB
L1I$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associative 
L1D$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associativewrite-back
L2$512 KiB
0.5 MiB
524,288 B
4.882812e-4 GiB
  2x256 KiB4-way set associativewrite-back
L3$4 MiB
4,096 KiB
4,194,304 B
0.00391 GiB
  2x2 MiB write-back

Memory controller

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeLPDDR3-1866
Supports ECCNo
Max Mem16 GiB
Controllers1
Channels2
Max Bandwidth27.81 GiB/s
28,477.44 MiB/s
29.861 GB/s
29,860.76 MB/s
0.0272 TiB/s
0.0299 TB/s
Bandwidth
Single 13.91 GiB/s
Double 27.81 GiB/s

Expansions

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIe
Revision3.0
Max Lanes10
Configs1x4, 2x2, 1x2+2x1, 4x1


Graphics

[Edit/Modify IGP Info]

screen icon.svg
Integrated Graphics Information
GPUHD Graphics 515
DesignerIntelDevice ID0x191E
Execution Units24Max Displays3
Max Memory16 GiB
16,384 MiB
16,777,216 KiB
17,179,869,184 B
Frequency300 MHz
0.3 GHz
300,000 KHz
Burst Frequency900 MHz
0.9 GHz
900,000 KHz
OutputDP, eDP, HDMI, DVI
Max Resolution
HDMI4096x2304 @24 Hz
DP3840x2160 @60 Hz
eDP3840x2160 @60 Hz
Standards
DirectX12
OpenGL4.4
OpenCL2.0
DP1.2
eDP1.3
HDMI1.4a
Additional Features
Intel Quick Sync Video
Intel InTru 3D
Intel Clear Video
Intel Clear Video HD

Features

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
SSEStreaming SIMD Extensions
SSE2Streaming SIMD Extensions 2
SSE3Streaming SIMD Extensions 3
SSSE3Supplemental SSE3
SSE4.1Streaming SIMD Extensions 4.1
SSE4.2Streaming SIMD Extensions 4.2
AVXAdvanced Vector Extensions
AVX2Advanced Vector Extensions 2
ABMAdvanced Bit Manipulation
BMI1Bit Manipulation Instruction Set 1
BMI2Bit Manipulation Instruction Set 2
AESAES Encryption Instructions
RdRandHardware RNG
ADXMulti-Precision Add-Carry
CLMULCarry-less Multiplication Extension
F16C16-bit Floating Point Conversion
x86-1616-bit x86
x86-3232-bit x86
x86-6464-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
NXNo-eXecute
HTHyper-Threading
TBT 2.0Turbo Boost Technology 2.0
EISTEnhanced SpeedStep Technology
VT-xVT-x (Virtualization)
VT-dVT-d (I/O MMU virtualization)
EPTExtended Page Tables (SLAT)
MPXMemory Protection Extensions
SGXSoftware Guard Extensions
Secure KeySecure Key Technology
SMEPOS Guard Technology
Flex MemoryFlex Memory Access
ISRTSmart Response Technology
MWTMy WiFi Technology

Drivers

Retrieved from "https://en.wikichip.org/w/index.php?title=intel/core_m/m5-6y54&oldid=50048"
Facts about "Core m5-6Y54 - Intel"
RDF feed
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Core m5-6Y54 - Intel#io +
device id0x191E +
drivers urlhttps://downloadcenter.intel.com/product/94026 +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has ecc memory supportfalse +
has extended page tables supporttrue +
has featureAdvanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Memory Protection Extensions +, Software Guard Extensions +, Secure Key Technology +, OS Guard +, Flex Memory Access +, Smart Response Technology + and My WiFi Technology +
has intel enhanced speedstep technologytrue +
has intel flex memory access supporttrue +
has intel my wifi technology supporttrue +
has intel secure key technologytrue +
has intel smart response technology supporttrue +
has intel supervisor mode execution protectiontrue +
has intel turbo boost technology 2 0true +
has intel vt-d technologytrue +
has intel vt-x technologytrue +
has second level address translation supporttrue +
has simultaneous multithreadingtrue +
has x86 advanced encryption standard instruction set extensiontrue +
integrated gpuHD Graphics 515 +
integrated gpu base frequency300 MHz (0.3 GHz, 300,000 KHz) +
integrated gpu designerIntel +
integrated gpu execution units24 +
integrated gpu max frequency900 MHz (0.9 GHz, 900,000 KHz) +
integrated gpu max memory16,384 MiB (16,777,216 KiB, 17,179,869,184 B, 16 GiB) +
l1$ size128 KiB (131,072 B, 0.125 MiB) +
l1d$ description8-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description8-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description4-way set associative +
l2$ size0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l3$ size4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) +
max memory bandwidth27.81 GiB/s (28,477.44 MiB/s, 29.861 GB/s, 29,860.76 MB/s, 0.0272 TiB/s, 0.0299 TB/s) +
max memory channels2 +
max pcie lanes10 +
supported memory typeLPDDR3-1866 +
x86/has memory protection extensionstrue +
x86/has software guard extensionstrue +