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Difference between revisions of "intel/xeon platinum/8168"
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{{intel title|Xeon Platinum 8168}} | {{intel title|Xeon Platinum 8168}} | ||
{{mpu | {{mpu | ||
− | | future | + | |future=Yes |
− | | name | + | |name=Xeon Platinum 8168 |
− | | no image | + | |no image=Yes |
− | + | |designer=Intel | |
− | + | |manufacturer=Intel | |
− | + | |model number=8168 | |
− | | designer | + | |part number=CD8067303327701 |
− | | manufacturer | + | |s-spec=SR37J |
− | | model number | + | |market=Server |
− | | part number | + | |first announced=April 25, 2017 |
− | + | |family=Xeon Platinum | |
− | + | |series=8100 | |
− | | s-spec | + | |locked=Yes |
− | + | |frequency=2,700 MHz | |
− | | market | + | |turbo frequency1=3,700 MHz |
− | | first announced | + | |bus type=DMI 3.0 |
− | + | |bus links=4 | |
− | + | |bus rate=8 GT/s | |
− | + | |clock multiplier=27 | |
− | + | |isa=x86-64 | |
− | + | |isa family=x86 | |
− | | family | + | |microarch=Skylake |
− | | series | + | |platform=Purley |
− | | locked | + | |chipset=Lewisburg |
− | | frequency | + | |core name=Skylake SP |
− | + | |core family=6 | |
− | | turbo frequency1 | + | |core stepping=H0 |
− | + | |process=14 nm | |
− | + | |technology=CMOS | |
− | + | |die area=<!-- XX mm² --> | |
− | + | |word size=64 bit | |
− | + | |core count=24 | |
− | + | |thread count=48 | |
− | + | |max cpus=2 | |
− | | bus type | + | |v core tolerance=<!-- OR ... --> |
− | | bus | + | |v io 2=<!-- OR ... --> |
− | | bus rate | + | |tdp=205 W |
− | + | |temp min=<!-- use TJ/TC whenever possible instead --> | |
− | | clock multiplier | + | |tjunc min=<!-- .. °C --> |
− | + | |package module 2=<!-------- USE ONLY IF MUST, OTHERWISE TRY TO USE MODULE ABOVE --------------> | |
− | + | |turbo frequency=Yes | |
− | + | |packaging=Yes | |
− | | isa | + | |package 0=FCLGA-3647 |
− | | isa | + | |package 0 type=LGA |
− | | microarch | + | |package 0 pins=3647 |
− | | platform | + | |socket 0=LGA-3647 |
− | | chipset | + | |socket 0 type=LGA |
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− | | package module 2 | ||
− | <!-------- USE ONLY IF MUST, OTHERWISE TRY TO USE MODULE ABOVE --------------> | ||
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}} | }} | ||
'''Xeon Platinum 8168''' is a {{arch|64}} [[x86]] high-performance server [[tetracosa-core]] [[multiprocessor]] set to be introduced by [[Intel]] in the second quarter of 2017. This processor is based on the server configuration of the {{intel|Skylake|l=arch}} microarchitecture (a {{intel|Skylake SP|l=core}} core) and is manufactured on Intel's [[14 nm process]]. The 8168 operates at 2.7 GHz with a TDP of 205 W and a {{intel|Turbo Boost|turbo frequency}} of 3.7 GHz for a single core. | '''Xeon Platinum 8168''' is a {{arch|64}} [[x86]] high-performance server [[tetracosa-core]] [[multiprocessor]] set to be introduced by [[Intel]] in the second quarter of 2017. This processor is based on the server configuration of the {{intel|Skylake|l=arch}} microarchitecture (a {{intel|Skylake SP|l=core}} core) and is manufactured on Intel's [[14 nm process]]. The 8168 operates at 2.7 GHz with a TDP of 205 W and a {{intel|Turbo Boost|turbo frequency}} of 3.7 GHz for a single core. |
Revision as of 23:55, 29 June 2017
Template:mpu Xeon Platinum 8168 is a 64-bit x86 high-performance server tetracosa-core multiprocessor set to be introduced by Intel in the second quarter of 2017. This processor is based on the server configuration of the Skylake microarchitecture (a Skylake SP core) and is manufactured on Intel's 14 nm process. The 8168 operates at 2.7 GHz with a TDP of 205 W and a turbo frequency of 3.7 GHz for a single core.
Cache
- Main article: Skylake § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller
Integrated Memory Controller
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Features
[Edit/Modify Supported Features]
Facts about "Xeon Platinum 8168 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon Platinum 8168 - Intel#io +, Xeon Platinum 8168 - Intel +, Xeon Platinum 8168 - Intel +, Xeon Platinum 8168 - Intel +, Xeon Platinum 8168 - Intel +, Xeon Platinum 8168 - Intel +, Xeon Platinum 8168 - Intel +, Xeon Platinum 8168 - Intel +, Xeon Platinum 8168 - Intel +, Xeon Platinum 8168 - Intel +, Xeon Platinum 8168 - Intel +, Xeon Platinum 8168 - Intel + and Xeon Platinum 8168 - Intel + |
base frequency | 2,700 MHz (2.7 GHz, 2,700,000 kHz) + |
chipset | Lewisburg + |
clock multiplier | 27 + |
core count | 24 + |
core family | 6 + |
core name | Skylake SP + |
core stepping | H0 + |
cpuid | 0x50654 + |
designer | Intel + |
family | Xeon Platinum + |
first announced | April 25, 2017 + |
first launched | July 11, 2017 + |
full page name | intel/xeon platinum/8168 + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has advanced vector extensions 512 | true + |
has ecc memory support | true + |
has extended page tables support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Vector Extensions 512 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables + and Transactional Synchronization Extensions + |
has intel enhanced speedstep technology | true + |
has intel speed shift technology | true + |
has intel trusted execution technology | true + |
has intel turbo boost technology 2 0 | true + |
has intel vpro technology | true + |
has intel vt-d technology | true + |
has intel vt-x technology | true + |
has second level address translation support | true + |
has simultaneous multithreading | true + |
has transactional synchronization extensions | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 1,536 KiB (1,572,864 B, 1.5 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 768 KiB (786,432 B, 0.75 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 768 KiB (786,432 B, 0.75 MiB) + |
l2$ description | 16-way set associative + |
l2$ size | 24 MiB (24,576 KiB, 25,165,824 B, 0.0234 GiB) + |
l3$ description | 11-way set associative + |
l3$ size | 33 MiB (33,792 KiB, 34,603,008 B, 0.0322 GiB) + |
ldate | July 11, 2017 + |
main image | + |
manufacturer | Intel + |
market segment | Server + |
max case temperature | 358.15 K (85 °C, 185 °F, 644.67 °R) + |
max cpu count | 8 + |
max dts temperature | 101 °C + |
max memory | 786,432 MiB (805,306,368 KiB, 824,633,720,832 B, 768 GiB, 0.75 TiB) + |
max memory bandwidth | 119.21 GiB/s (122,071.04 MiB/s, 128.001 GB/s, 128,000.763 MB/s, 0.116 TiB/s, 0.128 TB/s) + |
max memory channels | 6 + |
max pcie lanes | 48 + |
microarchitecture | Skylake (server) + |
min case temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
min dts temperature | 0 °C + |
model number | 8168 + |
name | Xeon Platinum 8168 + |
package | FCLGA-3647 + |
part number | CD8067303327701 + |
platform | Purley + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
release price | $ 5,890.00 (€ 5,301.00, £ 4,770.90, ¥ 608,613.70) + |
s-spec | SR37J + |
s-spec (qs) | QMQ8 + |
series | 8000 + |
smp interconnect | UPI + |
smp interconnect links | 3 + |
smp interconnect rate | 10.4 GT/s + |
smp max ways | 8 + |
socket | Socket P + and LGA-3647 + |
supported memory type | DDR4-2666 + |
tdp | 205 W (205,000 mW, 0.275 hp, 0.205 kW) + |
technology | CMOS + |
thread count | 48 + |
turbo frequency (1 core) | 3,700 MHz (3.7 GHz, 3,700,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |