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== Memory controller == | == Memory controller == | ||
− | + | This processors supports 2 DDR4 PHYs, each supporting 1 channel of 64-bit data plus [[ECC]] with 2 1,333 MT/s - 3,200 MT/s DIMMs per channel (UDIMM/SODIMM). | |
{{memory controller | {{memory controller | ||
− | |type=DDR4- | + | |type=DDR4-3200 |
|ecc=Yes | |ecc=Yes | ||
|max mem=64 GiB | |max mem=64 GiB | ||
− | |controllers= | + | |controllers=2 |
|channels=2 | |channels=2 | ||
|max bandwidth=39.74 GiB/s | |max bandwidth=39.74 GiB/s |
Revision as of 18:06, 1 May 2017
Template:mpu Ryzen 7 1800X is a 64-bit octa-core top-of-the-line performance x86 desktop SoC introduced by AMD in early 2017. The 1800X is AMD's flagship model based on their Zen microarchitecture, fabricated on a 14 nm process. The 1800X operates at a base frequency of 3.6 GHz with a TDP of 95 W and a Boost frequency of 4.0 GHz. This MPU supports up to 64 GiB of dual-channel DDR4-2666 ECC memory.
Contents
Overview
- Main article: Zen
The Ryzen 7 1800X is AMD's flagship system on chip based on the Zen microarchitecture. The 1800X integrates eight x86 cores and is the first AMD processor to support 2-way simultaneous multithreading. Sporting a base frequency of 3.6 GHz and a Boost frequency of 4.0 GHz, the 1800X is the fastest of the Ryzen processors. The 1800X is a complete SoC integrating a memory controller, along with much of the southbridge on-die. The 1800X includes 16 PCIe lanes for a GPU along with an NVMe controller and an additional 4 PCIe lanes for I/O along with SATA and USB 3.0 links.
Cache
- Main article: Zen § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller
This processors supports 2 DDR4 PHYs, each supporting 1 channel of 64-bit data plus ECC with 2 1,333 MT/s - 3,200 MT/s DIMMs per channel (UDIMM/SODIMM).
Integrated Memory Controller
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[Edit] Memory Configurations | |||
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Dual Channel | Single Rank | 2 DIMMs | DDR4-2666 |
4 DIMMs | DDR4-2133 | ||
Double Rank | 2 DIMMs | DDR4-2400 | |
4 DIMMs | DDR4-1866 |
Expansions
This SoC supports up to two 8x16 PCIe controllers supporting Gen1, Gen2, and Gen3. An additional 6 x4 PHYs plus 5 x2 PHYs supporting PCIe, WAFL, xGMI, SATA and Ethernet (See networking below).
Expansion Options
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- eMMC, LPC, SMBus, SPI/eSPI
Networking
PHYs support for up to 4 lanes of 10/100/1000 SGMII, or 10GBASE-KR, or 1000BASE-KX Ethernet operation.
Networking
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Audio
Support Azalia High Definition Audio
Graphics
This processor has no integrated graphics.
Features
[Edit/Modify Supported Features]
Supported x86 Extensions & Processor Features
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- This model has full XFR support, allowing for an additional +100 MHz boost frequency.
Die Shot
- See also: Zen § Die Shot
- 14 nm process
- 12 metal layers
- 2,000 meters of signals
- 4,800,000,000 transistors
- 22.01 mm x 8.87 mm
- ~195.228 mm²
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Ryzen 7 1800X - AMD#io + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has amd amd-v technology | true + |
has amd amd-vi technology | true + |
has amd extended frequency range | true + |
has amd sensemi technology | true + |
has ecc memory support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, SenseMI Technology + and Extended Frequency Range + |
has simultaneous multithreading | true + |
has x86 advanced encryption standard instruction set extension | true + |
l1$ size | 768 KiB (786,432 B, 0.75 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 256 KiB (262,144 B, 0.25 MiB) + |
l1i$ description | 4-way set associative + |
l1i$ size | 512 KiB (524,288 B, 0.5 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) + |
l3$ description | 16-way set associative + |
l3$ size | 16 MiB (16,384 KiB, 16,777,216 B, 0.0156 GiB) + |
max memory bandwidth | 39.74 GiB/s (40,693.76 MiB/s, 42.671 GB/s, 42,670.5 MB/s, 0.0388 TiB/s, 0.0427 TB/s) + |
max memory channels | 2 + |
max pcie lanes | 20 + |
supported memory type | DDR4-3200 + |