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Difference between revisions of "micro-operation"
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{{title|Micro-Operation (µOP)}} | {{title|Micro-Operation (µOP)}} | ||
− | '''Micro-Operation''' ('''Micro-Ops''' or '''µOP''') is a simpler internal representation of an [[architectural instruction]] as handled by the [[microprocessor]]. While exact definition of µOPs varies across implementations it is generally associated with designs that transform more complex (e.g. variable length or multiple operations) instructions with simple single-operation commands. Generally, Micro-Operations are a result of [[cracking]] [[Macro-Operations]]. While often associated with [[CISC]] [[ISA]]s such as [[x86]], micro-ops are also used in various [[RISC]] designs such as [[ARM]]. | + | '''Micro-Operation''' ('''Micro-Ops''' or '''µOP''') is a simpler internal representation of an [[architectural instruction]] as handled by the [[microprocessor]]. While exact definition of µOPs varies across implementations it is generally associated with designs that transform more complex (e.g. variable length or multiple operations) instructions with simple single-operation commands. Generally, Micro-Operations are a result of [[cracking]] [[Macro-Operations]]. It's a common misconception that micro-operations are exclusively a [[CISC]] concept. While more often associated with [[CISC]] [[ISA]]s such as [[x86]], micro-ops are also used in various [[RISC]] designs such as [[ARM]]. |
Revision as of 14:46, 23 April 2017
Micro-Operation (Micro-Ops or µOP) is a simpler internal representation of an architectural instruction as handled by the microprocessor. While exact definition of µOPs varies across implementations it is generally associated with designs that transform more complex (e.g. variable length or multiple operations) instructions with simple single-operation commands. Generally, Micro-Operations are a result of cracking Macro-Operations. It's a common misconception that micro-operations are exclusively a CISC concept. While more often associated with CISC ISAs such as x86, micro-ops are also used in various RISC designs such as ARM.