From WikiChip
Difference between revisions of "Template:planar comp header"

(Created page with "{| class="wikitable" style="float:left; margin:0; margin-right:-1px; font-family: monospace;" |- ! colspan="2" |   |- ! style="text-align: right;" colspan="2" | Proce...")
 
Line 20: Line 20:
 
  |-
 
  |-
 
  ! style="text-align: right;" | Voltage
 
  ! style="text-align: right;" | Voltage
 +
|-
 +
! style="text-align: right;" colspan="2" | Metal Layers
 
  |-
 
  |-
 
  ! style="text-align: right;" colspan="2" |  
 
  ! style="text-align: right;" colspan="2" |  

Revision as of 18:57, 5 April 2017

 
Process Name
1st Production
Lithography Lithography
Immersion
Exposure
Wafer Type
Size
Transistor Type
Voltage
Metal Layers
 
Gate Pitch (Lg)
Contacted Gate Pitch (CPP)
Minimum Metal Pitch (MMP)
SRAM bitcell High-Perf (HP)
High-Density (HD)
Low-Voltage (LV)
DRAM bitcell eDRAM