From WikiChip
Difference between revisions of "Template:finfet nodes comp"

Line 3: Line 3:
 
{| class="wikitable" style="margin:0; {{{style|}}}"
 
{| class="wikitable" style="margin:0; {{{style|}}}"
 
|- style="text-align: center;"
 
|- style="text-align: center;"
−
! colspan="2" | {{{process 1 fab|}}} || colspan="2" | {{{process 2 fab|}}} || colspan="2" | {{{process 3 fab|}}}
+
! colspan="2" | {{{process 1 fab|}}}<!--
 +
-->{{#if: {{{process 2 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 2 fab|}}} }}<!--
 +
-->{{#if: {{{process 3 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 3 fab|}}} }}<!--
 +
-->{{#if: {{{process 4 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 4 fab|}}} }}<!--
 +
-->{{#if: {{{process 5 fab|}}}| {{!}}{{!}} colspan="2" {{!}} {{{process 5 fab|}}} }}
 
|- style="text-align: center;"
 
|- style="text-align: center;"
 
| colspan="2" | {{{process 1 name|}}} || colspan="2" | {{{process 2 name|}}} || colspan="2" | {{{process 3 name|}}}
 
| colspan="2" | {{{process 1 name|}}} || colspan="2" | {{{process 2 name|}}} || colspan="2" | {{{process 3 name|}}}

Revision as of 02:31, 5 April 2017

 
Process Name
1st Production
Litho-
graphy 		Lithography
Immersion
Exposure
Wafer Type
Size
Tran-
sistor 		Type
Voltage
 
Fin Pitch
Width
Height
Gate Length (Lg)
Contacted Gate Pitch (CPP)
Minimum Metal Pitch (MMP)
SRAM
bitcell 		High-Perf (HP)
High-Density (HD)
Low-Voltage (LV)
DRAM
bitcell 		eDRAM
Value Value Value
Retrieved from "https://en.wikichip.org/w/index.php?title=Template:finfet_nodes_comp&oldid=40844"