From WikiChip
Difference between revisions of "Template:finfet nodes comp"

Line 39: Line 39:
 
| {{{process 1 dram|}}} || {{{process 1 dram Δ|}}} || {{{process 2 dram|}}} || {{{process 2 dram Δ|}}} || {{{process 3 dram|}}} || {{{process 3 dram Δ|}}}
 
| {{{process 1 dram|}}} || {{{process 1 dram Δ|}}} || {{{process 2 dram|}}} || {{{process 2 dram Δ|}}} || {{{process 3 dram|}}} || {{{process 3 dram Δ|}}}
 
|}
 
|}
 +
</div>

Revision as of 23:55, 4 April 2017

 
Process Name
1st Production
Litho-
graphy 		Lithography
Immersion
Exposure
Wafer Type
Size
Tran-
sistor 		Type
Voltage
 
Fin Pitch
Width
Height
Gate Length (Lg)
Contacted Gate Pitch (CPP)
Minimum Metal Pitch (MMP)
SRAM
bitcell 		High-Perf (HP)
High-Density (HD)
Low-Voltage (LV)
DRAM
bitcell 		eDRAM
Value Value Value
Retrieved from "https://en.wikichip.org/w/index.php?title=Template:finfet_nodes_comp&oldid=40829"