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Difference between revisions of "cavium/octeon/cn3005-400bg350-scp"
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| last order = | | last order = | ||
| last shipment = | | last shipment = | ||
− | | release price = | + | | release price = $29 |
| family = OCTEON | | family = OCTEON |
Revision as of 06:32, 8 December 2016
Template:mpu The CN3005-400 SCP is a 64-bit single-core MIPS secure communication microprocessor (SCP) designed by Cavium and introduced in early 2006. This processor, which incorporates a single cnMIPS core, operates at 400 MHz and dissipates 3 Watts. This processors includes a number of hardware security communication accelerators including units for encryption, QoS, and TCP acceleration.
Retrieved from "https://en.wikichip.org/w/index.php?title=cavium/octeon/cn3005-400bg350-scp&oldid=30630"
Facts about "CN3005-400 SCP - Cavium"
l1$ size | 24 KiB (24,576 B, 0.0234 MiB) + |
l1d$ description | 64-way set associative + |
l1d$ size | 8 KiB (8,192 B, 0.00781 MiB) + |
l1i$ description | 2-way set associative + |
l1i$ size | 16 KiB (16,384 B, 0.0156 MiB) + |
l2$ description | 2-way set associative + |
l2$ size | 0.0625 MiB (64 KiB, 65,536 B, 6.103516e-5 GiB) + |