From WikiChip
Difference between revisions of "amd/k6/amd-k6-233afr"
< amd‎ | k6

(Cache)
(fixed duped params)
Line 26: Line 26:
 
| s-spec              =  
 
| s-spec              =  
 
| cpuid              = 560
 
| cpuid              = 560
 
| microarch          = K6
 
| platform            =
 
| chipset            =
 
| core name          = 6k86
 
| core family        = 5
 
| core model          = 6
 
| core stepping      =
 
| core stepping 2    =
 
| process            = 350 nm
 
| transistors        = 8,800,000
 
| technology          = CMOS
 
| die size            = 162 mm²
 
| word size          = 32 bit
 
| core count          = 1
 
| thread count        = 1
 
| max cpus            = 1
 
| max memory          = 4 GB
 
| max memory addr    =
 
  
 
| microarch          = K6
 
| microarch          = K6

Revision as of 12:34, 21 November 2016

Template:mpu AMD-K6-233AFR was a 32-bit x86 microprocessor designed by AMD and introduced in early 1997. This chip, which was based on AMD's new K6 microarchitecture, operated at 233 MHz and dissipated a maximum of 28.3 W.

Cache

Main article: K6 § Cache

L2$ can be 256 KiB to 1 MiB, depending on manufacturer and motherboard model. L2$ is off-chip.

Cache Info [Edit Values]
L1I$ 32 KiB
32,768 B
0.0313 MiB
1x32 KiB 2-way set associative
L1D$ 32 KiB
32,768 B
0.0313 MiB
1x32 KiB 2-way set associative

Graphics

This SoC has no integrated graphics processing unit.

Features

Template:mpu features

  • Auto-power down state
  • Stop clock state

Documents

DataSheet

Facts about "AMD-K6-233AFR - AMD"
l1d$ description2-way set associative +
l1d$ size32 KiB (32,768 B, 0.0313 MiB) +
l1i$ description2-way set associative +
l1i$ size32 KiB (32,768 B, 0.0313 MiB) +