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Difference between revisions of "intel/core i3/i3-6100u"
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(→‎Cache)
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{{main|intel/microarchitectures/skylake#Memory_Hierarchy|l1=Skylake § Cache}}
 
{{main|intel/microarchitectures/skylake#Memory_Hierarchy|l1=Skylake § Cache}}
 
{{cache info
 
{{cache info
−
|l1i cache=64 KB
+
|l1i cache=64 KiB
−
|l1i break=2x32 KB
+
|l1i break=2x32 KiB
 
|l1i desc=8-way set associative
 
|l1i desc=8-way set associative
 
|l1i extra=(per core, write-back)
 
|l1i extra=(per core, write-back)
−
|l1d cache=64 KB
+
|l1d cache=64 KiB
−
|l1d break=2x32 KB
+
|l1d break=2x32 KiB
 
|l1d desc=8-way set associative
 
|l1d desc=8-way set associative
 
|l1d extra=(per core, write-back)
 
|l1d extra=(per core, write-back)
−
|l2 cache=512 KB
+
|l2 cache=512 KiB
−
|l2 break=2x256 KB
+
|l2 break=2x256 KiB
 
|l2 desc=4-way set associative
 
|l2 desc=4-way set associative
 
|l2 extra=(per core, write-back)
 
|l2 extra=(per core, write-back)

Revision as of 22:32, 20 September 2016

Template:mpu Core i3-6100U is a 64-bit dual-core low-end mobile performance microprocessor introduced by Intel late 2015. This processor, which is based on the Skylake microarchitecture and manufactured in 14 nm process, has a base frequency of 2.3 GHz with a TDP of 15 W with a configurable TDP-down of 7.5 W operating at 800 MHz. This processor incorporates the HD Graphics 520 GPU clocked at 300 MHz with a max frequency of 1 GHz.

Cache

Main article: Skylake § Cache
Cache Info [Edit Values]
L1I$ 64 KiB
65,536 B
0.0625 MiB
2x32 KiB 8-way set associative (per core, write-back)
L1D$ 64 KiB
65,536 B
0.0625 MiB
2x32 KiB 8-way set associative (per core, write-back)
L2$ 512 KiB
0.5 MiB
524,288 B
4.882812e-4 GiB
2x256 KiB 4-way set associative (per core, write-back)
L3$ 3 MiB
3,072 KiB
3,145,728 B
0.00293 GiB
shared

Graphics

Integrated Graphic Information
GPU Intel HD Graphics 520
Device ID 0x1916
Displays 3
Frequency 300 MHz
0.3 GHz
300,000 KHz
Max frequency 1 GHz
1,000 MHz
1,000,000 KHz
Max memory 32 GB
"GB" is not declared as a valid unit of measurement for this property.
Output DisplayPort, Embedded DisplayPort, HDMI, DVI
DirectX 12
OpenGL 4.4
OpenCL 2.0
HDMI 1.4a
DP 1.2
eDP 1.3
Max HDMI Res 4096x2304 @24 Hz
Max DP Res 4096x2304 @60 Hz
Max eDP Res 4096x2304 @60 Hz
Intel Quick Sync Video
Intel InTru 3D
Intel Insider
Intel WiDi (Wireless Display)
Intel Clear Video

Memory controller

Integrated Memory Controller
Type LPDDR3-1600, LPDDR3-1866, DDR4-1866, DDR4-2133
Controllers 1
Channels 2
ECC Support No
Max bandwidth 34,100 MB/s
Max memory 32,768 MB

Expansions

Template:mpu expansions

Features

Template:mpu features

Retrieved from "https://en.wikichip.org/w/index.php?title=intel/core_i3/i3-6100u&oldid=25576"
Facts about "Core i3-6100U - Intel"
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device id0x1916 +
has featureintegrated gpu +
integrated gpuIntel HD Graphics 520 +
integrated gpu base frequency300 MHz (0.3 GHz, 300,000 KHz) +
integrated gpu max frequency1,000 MHz (1 GHz, 1,000,000 KHz) +
l1d$ description8-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description8-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description4-way set associative +
l2$ size0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l3$ descriptionshared +
l3$ size3 MiB (3,072 KiB, 3,145,728 B, 0.00293 GiB) +