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Difference between revisions of "amd/duron/d600aut1b"
(Created page with "{{amd title|Duron 600 (Spitfire)}} {{mpu | name = Duron 600 | no image = Yes | image = | image size = | caption...") |
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| chipset = | | chipset = | ||
| core name = Spitfire | | core name = Spitfire | ||
| − | | core family = | + | | core family = 6 |
| core model = 3 | | core model = 3 | ||
| core stepping = 0 | | core stepping = 0 | ||
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| socket 0 type = PGA-462 | | socket 0 type = PGA-462 | ||
}} | }} | ||
| + | '''Duron 600''' based on the Spitfire core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in 2000. This model was part of the first series of the {{amd|Duron}} family. Designed based on AMD's {{amd|microarchitecture/k7|K7}} (a {{amd|Thunderbird}}-derivative) on a [[180 nm process]], this MPU operated at 550 MHz with a bus capable of 200 MT/s with a typical TDP of 27.4 W. | ||
Revision as of 22:35, 22 August 2016
Template:mpu Duron 600 based on the Spitfire core was a 32-bit x86 microprocessor developed by AMD and introduced in 2000. This model was part of the first series of the Duron family. Designed based on AMD's K7 (a Thunderbird-derivative) on a 180 nm process, this MPU operated at 550 MHz with a bus capable of 200 MT/s with a typical TDP of 27.4 W.
Facts about "Duron 600 (Spitfire) - AMD"
| has feature | Halt State + and Sleep State + |
| l1d$ description | 2-way set associative + |
| l1i$ description | 2-way set associative + |
| l2$ description | 16-way set associative + |