Semiconductor & Computer Engineering
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Difference between revisions of "12-bit architecture"
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The '''12-bit''' [[computer architecture]] is a [[microprocessor]] architecture that has a [[datapath]] width or a highest [[operand]] width of 12 bits or 1.5 [[octet]]s. These architectures typically have a matching [[register file]] with [[registers]] width of 12 bits. | The '''12-bit''' [[computer architecture]] is a [[microprocessor]] architecture that has a [[datapath]] width or a highest [[operand]] width of 12 bits or 1.5 [[octet]]s. These architectures typically have a matching [[register file]] with [[registers]] width of 12 bits. | ||
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== 12-bit microprocessors == | == 12-bit microprocessors == | ||
* [[Intersil 6100]] | * [[Intersil 6100]] | ||
* [[Toshiba TLCS-12]] | * [[Toshiba TLCS-12]] | ||
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{{stub}} | {{stub}} | ||
[[Category:12-bit microprocessors]] | [[Category:12-bit microprocessors]] | ||
Revision as of 22:34, 16 January 2016
The 12-bit computer architecture is a microprocessor architecture that has a datapath width or a highest operand width of 12 bits or 1.5 octets. These architectures typically have a matching register file with registers width of 12 bits.
12-bit microprocessors
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