Semiconductor & Computer Engineering
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Difference between revisions of "Template:cache info"
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| style="text-align: center; background: #ccffcc; font-size: 16px;" colspan="3" | '''Cache Info'''{{#if:{{{l1 cache|}}}| | | style="text-align: center; background: #ccffcc; font-size: 16px;" colspan="3" | '''Cache Info'''{{#if:{{{l1 cache|}}}| | ||
{{!-}} | {{!-}} | ||
| − | {{!}} style="text-align: center;" {{!}} ''' | + | {{!}} style="text-align: center;" {{!}} '''L1$''' {{!}} style="text-align: center;" {{{l1 cache}}} {{!}}{{!}} {{{l1 desc}}} {{{l1 extra}}}} |
}}<!-- | }}<!-- | ||
|- | |- | ||
| style="text-align: center;" | '''{{{1}}}''' || style="text-align: center;" | {{{2}}} || {{{3}}} {{{4}}} | | style="text-align: center;" | '''{{{1}}}''' || style="text-align: center;" | {{{2}}} || {{{3}}} {{{4}}} | ||
| − | {{#if:{{{l1 cache|}}}|{{{cache info/row|l1$|{{{l1 cache}}}| | + | {{#if:{{{l1 cache|}}}|{{{cache info/row|l1$|{{{l1 cache}}}|}}}} |
{{#if:{{{l1i cache|}}}|{{{cache info/row|l1I$|{{{l1i cache}}}|{{{l1i desc}}}|{{{l1i extra}}}}}}}}{{#if:{{{l1d cache|}}}|{{{cache info/row|l1D$|{{{l1d cache}}}|{{{l1d desc}}}|{{{l1d extra}}}}}}}}{{#if:{{{l2 cache|}}}|{{{cache info/row|l2$|{{{l2 cache}}}|{{{l2 desc}}}|{{{l2 extra}}}}}}}}{{#if:{{{l3 cache|}}}|{{{cache info/row|l3$|{{{l3 cache}}}|{{{l3 desc}}}|{{{l3 extra}}}}}}}}{{#if:{{{l4 cache|}}}|{{{cache info/row|l4$|{{{l4 cache}}}|{{{l4 desc}}}|{{{l4 extra}}}}}}}} | {{#if:{{{l1i cache|}}}|{{{cache info/row|l1I$|{{{l1i cache}}}|{{{l1i desc}}}|{{{l1i extra}}}}}}}}{{#if:{{{l1d cache|}}}|{{{cache info/row|l1D$|{{{l1d cache}}}|{{{l1d desc}}}|{{{l1d extra}}}}}}}}{{#if:{{{l2 cache|}}}|{{{cache info/row|l2$|{{{l2 cache}}}|{{{l2 desc}}}|{{{l2 extra}}}}}}}}{{#if:{{{l3 cache|}}}|{{{cache info/row|l3$|{{{l3 cache}}}|{{{l3 desc}}}|{{{l3 extra}}}}}}}}{{#if:{{{l4 cache|}}}|{{{cache info/row|l4$|{{{l4 cache}}}|{{{l4 desc}}}|{{{l4 extra}}}}}}}} | ||
Revision as of 01:05, 8 January 2016
| Cache Info |