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==[[HiSilicon]]==
 +
 
 +
=== Kirin 9000E, 9000L, 9000 5G/4G series ===
 +
Kirin 9000 is [[HiSilicon]]'s first SoC based on [[5 nm]]+ FinFET (EUV) [[TSMC]] technology (N5 node)
 +
:and the first [[5 nm]] SoC to be launched on the international market. <ref>{{cite book |title=Kirin 9000 |website=hisilicon.com |url=https://www.hisilicon.com/en/products/Kirin/Kirin-flagship-chips/Kirin-9000 |date=16 September 2021}}</ref>
 +
 
 +
This [[octa-core]] [[system on a chip]] is based on the 9th Gen of the [[HiSilicon]] [[Kirin]]
 +
:series and is equipped with 15.3 billion transistors in a 1+3+4 core configuration:
 +
*4x ARM Cortex-A77 CPU (1x 3.13 GHz and 3x 2.54 GHz),
 +
*4x ARM Cortex-A55 (4x 2.05 GHz) and
 +
*[[24-core]] Mali-G78 GPU (22-core in the Kirin 9000E version)
 +
 
 +
The Kirin 9000L uses a 1+2+3 core configuration:
 +
*3x ARM Cortex-A77 (1x 3.13 GHz and 2x 2.54 GHz),
 +
*3x ARM Cortex-A55 (3x 2.05 GHz) and
 +
*22-core Mali-G78 GPU with Kirin Gaming + 3.0 implementation
 +
<!--
 +
The integrated quad pipeline NPU (Dual Big Core + 1 Tiny Core configuration) is equipped with the Kirin ISP 6.0
 +
:to support advanced computational photography.
 +
The Huawei Da Vinci Architecture 2.0 for [[Artificial intelligence|AI]] supports 2x Ascend Lite + 1x Ascend Tiny
 +
:(only 1 Lite in 9000E/L).
 +
The system cache is 8 MB and the SoC works with the new LPDDR5/4X memories (made by [[Samsung]] in the Huawei Mate 40 series).
 +
:Due to the integrated 3rd generation 5G proprietary modem "Balong 5000", Kirin 9000 supports 2G, 3G, 4G and 5G SA & NSA Sub-6 GHz connectivity. The SoC's Thermal design power (TDP) is 6 W.
 +
The 2021 4G version of the Kirin 9000 has the Balong modem limited via software to comply with the ban
 +
:imposed on Huawei by the US government for non-chinese 5G technologies.
 +
The Kirin 9006C is a rebranded variant of the Kirin 9000E for the Huawei Qingyun L420 and L540 laptops. -->
 +
:;Spec
 +
* GPU
 +
**Kirin 9000L: ARM Mali-G78 MP22
 +
**Kirin 9000E: ARM Mali-G78 MP22
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**Kirin 9000: ARM Mali-G78 MP24
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*Da Vinci NPU architecture 2.0
 +
**Kirin 9000L: 1x Big Core + 1x Tiny Core
 +
**Kirin 9000E: 1x Big Core + 1x Tiny Core
 +
**Kirin 9000: 2x Big Cores + 1x Tiny Core
 +
 
 +
{| class="wikitable"
 +
|-
 +
! rowspan="2" | Model number
 +
! rowspan="2" | Fab node
 +
! colspan="4" | CPU
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! colspan="2" | GPU
 +
! colspan="3" | Memory technology
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! rowspan="2" | Sampling <br>availability
 +
|-
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! [[ISA]]
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! [[Microarchitecture|µarch]]
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! Cores
 +
! Freq (GHz)
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! [[Microarchitecture|µarch]]
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! Freq <br>(MHz)
 +
! Type
 +
! Bus width <br>(bit)
 +
! Band width <br>(GB/s)
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|-
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! Kirin 9000L
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| rowspan="3" | [[TSMC]] [[5 nm]]+ <br>[[FinFET]] ([[EUV]])
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| rowspan="3" |[[ARMv8|ARM<br>v8.2-A]]
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| rowspan="3" |[[Cortex-A77]] <br>[[Cortex-A55]] <br>([[big.LITTLE]])
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| (1+2)+3
 +
| rowspan="3" | 3.13&nbsp;(A77&nbsp;H)<br>2.54&nbsp;(A77&nbsp;L)<br>2.05&nbsp;(A55)
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| rowspan="2" | Mali-G78 <br>MP22
 +
| rowspan="2" | 759&nbsp;MHz <br>(1068.7 <br>GFLOPS <br>in FP32)
 +
| rowspan="3" | LPDDR4X<br>-2133 <br>LPDDR5<br>-2750
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| rowspan="3" | 64-bit (4x16-bit)<br>Quad-channel
 +
| rowspan="3" | LPDDR4X<br>(34.1 GB/s)<br>LPDDR5<br>(44.0 GB/s)
 +
| rowspan="3" | Q4 2020
 +
|-
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! Kirin 9000E
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| rowspan="2" | (1+3)+4
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|-
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! Kirin 9000<br>(Hi36A0V101)<br>Kirin 9000 4G<br>Kirin 9000 5G
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| Mali-G78 <br>MP24
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| 759&nbsp;MHz <br>(1165.8 <br>GFLOPS <br>in FP32)
 +
|-
 +
|}
 +
 
 +
=== Kirin 9000S, 9010, 9020 series===
 +
The Kirin 9000S, Kirin 9000S1, and Kirin 9010 of the Kirin 9000 (Hi36A0) family are the first [[HiSilicon]]-developed
 +
:SoCs manufactured in high volumes in mainland China by [[Semiconductor Manufacturing International Corporation|SMIC]].
 +
<!--
 +
The SoC had its debut with the [[Huawei Mate 60]] in late 2023 with the Kirin 9000S alongside overclocked enhancements of the Kirin 9000S1 and Kirin 9010 with the Huawei Pura 70 series in early 2024.
 +
According to Tom's Hardware, the Taishan V120 core, developed by HiSilicon, was roughly on par with AMD's Zen 3 cores from late 2020. Four of these cores were used in the 9000 series alongside four efficiency-focused [[Cortex-A510]] cores.
 +
The SoCs are based on SMIC's [[7 nm process|7 nm]] technology node, referred to as "N+2". It also includes 1 Da Vinci "big" NPU core and 1 Da Vinci "small" NPU core. Kirin 9000W, a Wi-Fi only SoC for the Huawei MatePad Pro 13.2 Wi-Fi only model, debuted in global markets in Q1 2024. The Kirin 9010 and Kirin 9000S1 debuted in Q2 2024, using a modified 2+6+4 core configuration with a new large Taishan core with the same configurations of medium and small cores from the Kirin 9000S with faster enhancements over the Kirin 9000S. -->
 +
 
 +
{| class="wikitable"
 +
|-
 +
! rowspan="2" | Model number
 +
! rowspan="2" | Fab node
 +
! colspan="4" | CPU
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! colspan="2" | GPU
 +
! colspan="3" | Memory technology
 +
! rowspan="2" | Sampling <br>availability
 +
|-
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! [[ISA]]
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! [[Microarchitecture|µarch]]
 +
! Cores (total)<hr>Threads (total)
 +
! Freq (GHz)
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! [[Microarchitecture|µarch]]
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! Freq <br>(MHz)
 +
! Type
 +
! Bus width <br>(bit)
 +
! Band width <br>(GB/s)
 +
|-
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| Kirin 9000S <br>(Hi36A0V120)
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| rowspan="17" | [[SMIC]] <br>[[7 nm]] <br>[[FinFET]]
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| rowspan="17" | [[ARMv8]].x
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| rowspan="15" | [[HiSilicon]] <br>Taishan, <br>[[Cortex-A510]]
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| rowspan="7"| 1+3+4 (8)<hr>2+6+4 (12)
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| 2.62 GHz <br>(TaishanV120)<br>2.15 GHz <br>(TaishanV120)<br>1.53 GHz <br>([[Cortex-A510]])
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| rowspan="15" | [[HiSilicon]] <br>Maleoon <br>910
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| rowspan="15" | 750 <br>MHz
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| rowspan="17" | LPDDR5<br>-6400 <br>LPDDR5X<br>-8533
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| rowspan="17" | 64-bit <br>(4x16-bit) <br>Quad-<br>channel
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| rowspan="17" | LPDDR5<br>(51.2 MB/s)<br>LPDDR5X<br>(68.2 MB/s)
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| Q3 2023
 +
|-
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| Kirin 9000S1 <br>(Hi36A0V120)
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| rowspan="6"| 2.49 GHz <br>(TaishanV120)<br>2.15 GHz <br>(TaishanV120)<br>1.53 GHz <br>([[Cortex-A510]])
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| Q1 2024
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|-
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| Kirin 9000W <br>(Hi36A0V120)
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| Q4 2023
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|-
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| Kirin 9000WL <br>(Hi36A0V120)
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| Q2 2024
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|-
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| Kirin 9000WE <br>(Hi36A0V120)
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| Q2 2024
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|-
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| Kirin T90 <br>(Hi36A0V120)
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| Q3 2024
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|-
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| Kirin T90A <br>(Hi36A0V120)
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| Q3 2024
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|-
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| Kirin 9000SL <br>(Hi36A0V120)
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| rowspan="2"| 1+2+3 (6)<hr>2+4+3 (9)
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| rowspan="2"| 2.35 GHz <br>(TaishanV120)<br>2.15 GHz <br>(TaishanV120)<br>1.53 GHz <br>([[Cortex-A510]])
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| Q4 2023
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|-
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| Kirin 9000WM <br>(Hi36A0V120)
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| Q2 2024
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|-
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| Kirin 9010 <br>(Hi36A0V121)
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| rowspan="5"| 1+3+4 (8) <hr>2+6+4 (12)
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| 2.30 GHz <br>(TaishanV121)<br>2.18 GHz <br>(TaishanV120)<br>1.55 GHz <br>([[Cortex-A510]])
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| Q2 2024
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|-
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| Kirin 9010E <br>(Hi36A0V121)
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| rowspan="4"| 2.19 GHz <br>(TaishanV121)<br>2.18 GHz <br>(TaishanV120)<br>1.55 GHz <br>([[Cortex-A510]])
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| Q3 2024
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|-
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| Kirin 9010A <br>(Hi36A0V121)
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| Q3 2024
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|-
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| Kirin 9010W <br>(Hi36A0V121)
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| Q3 2024
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|-
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| Kirin T91 <br>(Hi36A0V121)
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| Q3 2024
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|-
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| Kirin 9010L <br>(Hi36A0V121)
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| 1+2+3 (6) <hr>2+4+3 (9)
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| 2.19 GHz <br>(TaishanV121)<br>2.18 GHz <br>(TaishanV120)<br>1.40 GHz <br>([[Cortex-A510]])
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| Q2 2024
 +
|-
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| Kirin 9020 <br>(Hi36C0V110)
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| rowspan="2" | [[HiSilicon]] <br>Taishan
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| rowspan="2" | 1+3+4 (8) <hr>2+6+4 (12)
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| rowspan="2" | 2.50 GHz <br>(TaishanV123)<br>2.15 GHz <br>(TaishanV120)<br>1.60 GHz <br>(Taishan-Little)
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| rowspan="2" | [[HiSilicon]] <br>Maleoon <br>920
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| rowspan="2" | 840 <br>MHz
 +
| Q4 2024
 +
|-
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| Kirin T92 <br>(Hi36C0V110)
 +
| Q4 2024
 +
|-
 +
|}

Revision as of 17:00, 27 March 2025

HiSilicon

Kirin 9000E, 9000L, 9000 5G/4G series

Kirin 9000 is HiSilicon's first SoC based on 5 nm+ FinFET (EUV) TSMC technology (N5 node)

and the first 5 nm SoC to be launched on the international market. [1]

This octa-core system on a chip is based on the 9th Gen of the HiSilicon Kirin

series and is equipped with 15.3 billion transistors in a 1+3+4 core configuration:
  • 4x ARM Cortex-A77 CPU (1x 3.13 GHz and 3x 2.54 GHz),
  • 4x ARM Cortex-A55 (4x 2.05 GHz) and
  • 24-core Mali-G78 GPU (22-core in the Kirin 9000E version)

The Kirin 9000L uses a 1+2+3 core configuration:

  • 3x ARM Cortex-A77 (1x 3.13 GHz and 2x 2.54 GHz),
  • 3x ARM Cortex-A55 (3x 2.05 GHz) and
  • 22-core Mali-G78 GPU with Kirin Gaming + 3.0 implementation
Spec
  • GPU
    • Kirin 9000L: ARM Mali-G78 MP22
    • Kirin 9000E: ARM Mali-G78 MP22
    • Kirin 9000: ARM Mali-G78 MP24
  • Da Vinci NPU architecture 2.0
    • Kirin 9000L: 1x Big Core + 1x Tiny Core
    • Kirin 9000E: 1x Big Core + 1x Tiny Core
    • Kirin 9000: 2x Big Cores + 1x Tiny Core
Model number Fab node CPU GPU Memory technology Sampling
availability
ISA µarch Cores Freq (GHz) µarch Freq
(MHz) 		Type Bus width
(bit) 		Band width
(GB/s)
Kirin 9000L TSMC 5 nm+
FinFET (EUV) 		ARM
v8.2-A 		Cortex-A77
Cortex-A55
(big.LITTLE) 		(1+2)+3 3.13 (A77 H)
2.54 (A77 L)
2.05 (A55) 		Mali-G78
MP22 		759 MHz
(1068.7
GFLOPS
in FP32) 		LPDDR4X
-2133
LPDDR5
-2750 		64-bit (4x16-bit)
Quad-channel 		LPDDR4X
(34.1 GB/s)
LPDDR5
(44.0 GB/s) 		Q4 2020
Kirin 9000E (1+3)+4
Kirin 9000
(Hi36A0V101)
Kirin 9000 4G
Kirin 9000 5G 		Mali-G78
MP24 		759 MHz
(1165.8
GFLOPS
in FP32)

Kirin 9000S, 9010, 9020 series

The Kirin 9000S, Kirin 9000S1, and Kirin 9010 of the Kirin 9000 (Hi36A0) family are the first HiSilicon-developed

SoCs manufactured in high volumes in mainland China by SMIC.
Model number Fab node CPU GPU Memory technology Sampling
availability
ISA µarch Cores (total)
Threads (total) 		Freq (GHz) µarch Freq
(MHz) 		Type Bus width
(bit) 		Band width
(GB/s)
Kirin 9000S
(Hi36A0V120) 		SMIC
7 nm
FinFET 		ARMv8.x HiSilicon
Taishan,
Cortex-A510 		1+3+4 (8)
2+6+4 (12) 		2.62 GHz
(TaishanV120)
2.15 GHz
(TaishanV120)
1.53 GHz
(Cortex-A510) 		HiSilicon
Maleoon
910 		750
MHz 		LPDDR5
-6400
LPDDR5X
-8533 		64-bit
(4x16-bit)
Quad-
channel 		LPDDR5
(51.2 MB/s)
LPDDR5X
(68.2 MB/s) 		Q3 2023
Kirin 9000S1
(Hi36A0V120) 		2.49 GHz
(TaishanV120)
2.15 GHz
(TaishanV120)
1.53 GHz
(Cortex-A510) 		Q1 2024
Kirin 9000W
(Hi36A0V120) 		Q4 2023
Kirin 9000WL
(Hi36A0V120) 		Q2 2024
Kirin 9000WE
(Hi36A0V120) 		Q2 2024
Kirin T90
(Hi36A0V120) 		Q3 2024
Kirin T90A
(Hi36A0V120) 		Q3 2024
Kirin 9000SL
(Hi36A0V120) 		1+2+3 (6)
2+4+3 (9) 		2.35 GHz
(TaishanV120)
2.15 GHz
(TaishanV120)
1.53 GHz
(Cortex-A510) 		Q4 2023
Kirin 9000WM
(Hi36A0V120) 		Q2 2024
Kirin 9010
(Hi36A0V121) 		1+3+4 (8)
2+6+4 (12) 		2.30 GHz
(TaishanV121)
2.18 GHz
(TaishanV120)
1.55 GHz
(Cortex-A510) 		Q2 2024
Kirin 9010E
(Hi36A0V121) 		2.19 GHz
(TaishanV121)
2.18 GHz
(TaishanV120)
1.55 GHz
(Cortex-A510) 		Q3 2024
Kirin 9010A
(Hi36A0V121) 		Q3 2024
Kirin 9010W
(Hi36A0V121) 		Q3 2024
Kirin T91
(Hi36A0V121) 		Q3 2024
Kirin 9010L
(Hi36A0V121) 		1+2+3 (6)
2+4+3 (9) 		2.19 GHz
(TaishanV121)
2.18 GHz
(TaishanV120)
1.40 GHz
(Cortex-A510) 		Q2 2024
Kirin 9020
(Hi36C0V110) 		HiSilicon
Taishan 		1+3+4 (8)
2+6+4 (12) 		2.50 GHz
(TaishanV123)
2.15 GHz
(TaishanV120)
1.60 GHz
(Taishan-Little) 		HiSilicon
Maleoon
920 		840
MHz 		Q4 2024
Kirin T92
(Hi36C0V110) 		Q4 2024
  1. ↑ (16 September 2021) Kirin 9000.
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