Semiconductor & Computer Engineering
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Difference between revisions of "intel/microarchitectures/diamond rapids"
(Correcting process node and adding the "forest" architecture for the 7th gen Xeon Scalable) |
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=== Key changes from {{\\|Granite Rapids}}=== | === Key changes from {{\\|Granite Rapids}}=== | ||
* Core | * Core | ||
| − | ** {{\\| Cove}} '''→''' {{\\| Cove}} | + | ** {{\\| Redwood Cove+}} '''→''' {{\\| Lion Cove+}} |
* Platform | * Platform | ||
** {{intel|Eagle Stream|l=platform}} '''→''' {{intel|Mountain Stream|l=platform}} | ** {{intel|Eagle Stream|l=platform}} '''→''' {{intel|Mountain Stream|l=platform}} | ||
{{expand list}} | {{expand list}} | ||
Revision as of 17:36, 13 October 2023
| Edit Values | |
| Diamond Rapids µarch | |
| General Info | |
| Arch Type | CPU |
| Designer | Intel |
| Manufacturer | Intel |
| Introduction | 2025 |
| Process | 18A |
| Instructions | |
| ISA | x86-64 |
| Cores | |
| Core Names | Lion Cove+ |
| Succession | |
| Contemporary | |
| Clearwater Forest | |
Diamond Rapids (DMR) is Intel's successor to Granite Rapids, an Intel 20A or 18A process microarchitecture for enthusiasts and servers.
Process Technology
Diamond Rapids is planned for Intel's 20A or 18A process.
Architecture
Key changes from Granite Rapids
- Core
- Platform
This list is incomplete; you can help by expanding it.
Facts about "Diamond Rapids - Microarchitectures - Intel"
| codename | Diamond Rapids + |
| designer | Intel + |
| first launched | 2025 + |
| full page name | intel/microarchitectures/diamond rapids + |
| instance of | microarchitecture + |
| instruction set architecture | x86-64 + |
| manufacturer | Intel + |
| microarchitecture type | CPU + |
| name | Diamond Rapids + |