From WikiChip
Difference between revisions of "intel/xeon e3/e3-1505m v5"
< intel

Line 79: Line 79:
 
|l3 break=4x2 MiB
 
|l3 break=4x2 MiB
 
|l3 policy=write-back
 
|l3 policy=write-back
 +
}}
 +
 +
== Memory controller ==
 +
{{memory controller
 +
|type=LPDDR3-1866
 +
|type 2=DDR3L-1600
 +
|type 3=DDR4-2133
 +
|ecc=Yes
 +
|max mem=64 GiB
 +
|controllers=1
 +
|channels=2
 +
|max bandwidth=31.79 GiB/s
 +
|bandwidth schan=15.89 GiB/s
 +
|bandwidth dchan=31.79 GiB/s
 
}}
 
}}
  
Line 130: Line 144:
 
| intel fdi          =  
 
| intel fdi          =  
 
| intel clear video  = Yes
 
| intel clear video  = Yes
−
}}
 
−
 
−
== Memory controller ==
 
−
{{integrated memory controller
 
−
| type              = LPDDR3-1600
 
−
| type 2            = LPDDR3-1866
 
−
| type 3            = DDR4-1866
 
−
| type 4            = DDR4-2133
 
−
| controllers        = 1
 
−
| channels          = 2
 
−
| ecc support        = Yes
 
−
| max bandwidth      = 34.1 GB/s
 
−
| bandwidth schan    =
 
−
| bandwidth dchan    =
 
−
| max memory        = 64 GiB
 
 
}}
 
}}
  

Revision as of 00:14, 8 July 2017

Template:mpu Xeon E3-1505M v5 is a 64-bit quad-core x86 mobile workstation microprocessor introduced by Intel in early-2016. This processor, which is based on the Skylake microarchitecture, is manufactured on Intel's 14 nm process. The E3-1505M v5 operates at 2.8 GHz with a TDP of 45 W and with a Turbo Boost frequency of 3.7 GHz for a single active core. This MPU supports up to 64 GiB of dual-channel ECC DDR4-2133 memory and incorporates Intel's HD Graphics P530 IGP operating at 350 MHz with a burst frequency of 1.05 GHz.

Cache

Main article: Skylake § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$256 KiB
262,144 B
0.25 MiB
L1I$128 KiB
131,072 B
0.125 MiB
4x32 KiB8-way set associative 
L1D$128 KiB
131,072 B
0.125 MiB
4x32 KiB8-way set associativewrite-back
L2$1 MiB
1,024 KiB
1,048,576 B
9.765625e-4 GiB
  4x256 KiB4-way set associativewrite-back
L3$8 MiB
8,192 KiB
8,388,608 B
0.00781 GiB
  4x2 MiB write-back

Memory controller

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeLPDDR3-1866, DDR3L-1600, DDR4-2133
Supports ECCYes
Max Mem64 GiB
Controllers1
Channels2
Max Bandwidth31.79 GiB/s
32,552.96 MiB/s
34.134 GB/s
34,134.253 MB/s
0.031 TiB/s
0.0341 TB/s
Bandwidth
Single 15.89 GiB/s
Double 31.79 GiB/s

Graphics

Integrated Graphic Information
GPU Intel HD Graphics P530
Device ID 0x191D
Execution Units 24
Displays 3
Frequency 350 MHz
0.35 GHz
350,000 KHz
Max frequency 1.05 GHz
1,050 MHz
1,050,000 KHz
Max memory 1.7 GiB
1,740.8 MiB
1,782,579.2 KiB
1,825,361,100.8 B
Output DisplayPort, Embedded DisplayPort, HDMI, DVI
DirectX 12.1
OpenGL 4.4
OpenCL 2.0
HDMI 1.4
DP 1.2
eDP 1.3
Max HDMI Res 4096x2160 @24 Hz
Max DP Res 4096x2304 @60 Hz
Max eDP Res 4096x2304 @60 Hz
Intel Quick Sync Video
Intel InTru 3D
Intel Insider
Intel WiDi (Wireless Display)
Intel Clear Video

Expansions

Template:mpu expansions

Features

Template:mpu features

Retrieved from "https://en.wikichip.org/w/index.php?title=intel/xeon_e3/e3-1505m_v5&oldid=52980"
Facts about "Xeon E3-1505M v5 - Intel"
RDF feed
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Xeon E3-1505M v5 - Intel#package + and Xeon E3-1505M v5 - Intel#io +
base frequency2,800 MHz (2.8 GHz, 2,800,000 kHz) +
bus links4 +
bus rate8,000 MT/s (8 GT/s, 8,000,000 kT/s) +
bus typeDMI 3.0 +
clock multiplier28 +
core count4 +
core family6 +
core model94 +
core nameSkylake H +
core steppingR0 +
core voltage (max)1.52 V (15.2 dV, 152 cV, 1,520 mV) +
core voltage (min)0.55 V (5.5 dV, 55 cV, 550 mV) +
designerIntel +
device id0x191D +
die area122 mm² (0.189 in², 1.22 cm², 122,000,000 µm²) +
familyXeon E3 +
first announcedSeptember 1, 2015 +
first launchedOctober 12, 2015 +
full page nameintel/xeon e3/e3-1505m v5 +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has ecc memory supporttrue +
has extended page tables supporttrue +
has featureAdvanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions +, Memory Protection Extensions +, Software Guard Extensions +, Secure Key Technology +, OS Guard +, Flex Memory Access +, Smart Response Technology +, My WiFi Technology +, Stable Image Platform Program + and Identity Protection Technology +
has intel enhanced speedstep technologytrue +
has intel flex memory access supporttrue +
has intel identity protection technology supporttrue +
has intel my wifi technology supporttrue +
has intel secure key technologytrue +
has intel smart response technology supporttrue +
has intel stable image platform program supporttrue +
has intel supervisor mode execution protectiontrue +
has intel turbo boost technology 2 0true +
has intel vpro technologytrue +
has intel vt-d technologytrue +
has intel vt-x technologytrue +
has locked clock multipliertrue +
has second level address translation supporttrue +
has simultaneous multithreadingtrue +
has transactional synchronization extensionstrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
integrated gpuHD Graphics P530 +
integrated gpu base frequency350 MHz (0.35 GHz, 350,000 KHz) +
integrated gpu designerIntel +
integrated gpu execution units24 +
integrated gpu max frequency1,050 MHz (1.05 GHz, 1,050,000 KHz) +
integrated gpu max memory1,740.8 MiB (1,782,579.2 KiB, 1,825,361,100.8 B, 1.7 GiB) +
isax86-64 +
isa familyx86 +
l1$ size256 KiB (262,144 B, 0.25 MiB) +
l1d$ description8-way set associative +
l1d$ size128 KiB (131,072 B, 0.125 MiB) +
l1i$ description8-way set associative +
l1i$ size128 KiB (131,072 B, 0.125 MiB) +
l2$ description4-way set associative +
l2$ size1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
l3$ size8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) +
ldateOctober 12, 2015 +
main imageFile:skylake h (front).png +
manufacturerIntel +
market segmentMobile +
max cpu count1 +
max junction temperature373.15 K (100 °C, 212 °F, 671.67 °R) +
max memory65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB, 0.0625 TiB) +
max memory bandwidth31.79 GiB/s (32,552.96 MiB/s, 34.134 GB/s, 34,134.253 MB/s, 0.031 TiB/s, 0.0341 TB/s) +
max memory channels2 +
max operating temperature100 °C +
max pcie lanes16 +
max storage temperature398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitectureSkylake +
min junction temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min operating temperature0 °C +
min storage temperature248.15 K (-25 °C, -13 °F, 446.67 °R) +
model numberE3-1505M v5 +
nameXeon E3-1505M v5 +
packageFCBGA-1440 +
part numberCL8066202191415 +
platformGreenlow +
process14 nm (0.014 μm, 1.4e-5 mm) +
release price$ 434.00 (€ 390.60, £ 351.54, ¥ 44,845.22) +
s-specSR2FN +
seriesE3-1500 v5 +
smp max ways1 +
supported memory typeLPDDR3-1866 +, DDR3L-1600 + and DDR4-2133 +
tdp45 W (45,000 mW, 0.0603 hp, 0.045 kW) +
tdp down35 W (35,000 mW, 0.0469 hp, 0.035 kW) +
technologyCMOS +
thread count8 +
turbo frequency (1 core)3,700 MHz (3.7 GHz, 3,700,000 kHz) +
turbo frequency (2 cores)3,500 MHz (3.5 GHz, 3,500,000 kHz) +
turbo frequency (3 cores)3,400 MHz (3.4 GHz, 3,400,000 kHz) +
turbo frequency (4 cores)3,300 MHz (3.3 GHz, 3,300,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +
x86/has memory protection extensionstrue +
x86/has software guard extensionstrue +