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Difference between revisions of "intel/xeon e3/e3-1280 v5"
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{{intel title|Xeon E3-1280 v5}} | {{intel title|Xeon E3-1280 v5}} | ||
{{mpu | {{mpu | ||
− | | name | + | |name=Xeon E3-1280 v5 |
− | | | + | |image=skylake dt (front).png |
− | + | |image size=250px | |
− | | image size | + | |designer=Intel |
− | + | |manufacturer=Intel | |
− | | designer | + | |model number=E3-1280 v5 |
− | | manufacturer | + | |part number=CM8066201921607 |
− | | model number | + | |s-spec=SR2CL |
− | | part number | + | |s-spec 2=SR2LC |
− | | market | + | |market=Server |
− | | first announced | + | |first announced=October 19, 2015 |
− | | first launched | + | |first launched=October 19, 2015 |
− | + | |release price=$612 | |
− | + | |family=Xeon E3 | |
− | | release price | + | |series=E3-1200 v5 |
− | + | |locked=Yes | |
− | | family | + | |frequency=3,700 MHz |
− | | series | + | |turbo frequency1=4,000 MHz |
− | | locked | + | |bus type=DMI 3.0 |
− | | frequency | + | |bus links=4 |
− | + | |bus rate=8 GT/s | |
− | | turbo frequency1 | + | |clock multiplier=37 |
− | + | |cpuid=506E3 | |
− | + | |isa=x86-64 | |
− | + | |isa family=x86 | |
− | | bus type | + | |microarch=Skylake |
− | | bus | + | |platform=Greenlow |
− | | bus rate | + | |chipset=Sunrise Point |
− | | clock multiplier | + | |core name=Skylake DT |
− | + | |core family=6 | |
− | + | |core model=94 | |
− | + | |core stepping=R0 | |
− | + | |process=14 nm | |
− | | cpuid | + | |technology=CMOS |
− | + | |die area=122 mm² | |
− | | isa | + | |word size=64 bit |
− | | isa | + | |core count=4 |
− | | microarch | + | |thread count=8 |
− | | platform | + | |max cpus=1 |
− | | chipset | + | |max memory=64 GiB |
− | | core name | + | |v core min=0.55 V |
− | | core family | + | |v core max=1.52 V |
− | | core model | + | |tdp=80 W |
− | | core stepping | + | |tjunc min=0 °C |
− | | process | + | |tjunc max=100 °C |
− | + | |tstorage min=-25 °C | |
− | | technology | + | |tstorage max=125 °C |
− | | die area | + | |package module 1={{packages/intel/lga-1151}} |
− | | word size | + | |turbo frequency=Yes |
− | | core count | ||
− | | thread count | ||
− | | max cpus | ||
− | | max memory | ||
− | |||
− | |||
− | | v core min | ||
− | | v core max | ||
− | |||
− | | tdp | ||
− | | tjunc min | ||
− | | tjunc max | ||
− | |||
− | |||
− | | tstorage min | ||
− | | tstorage max | ||
− | |||
− | |||
− | |||
− | | package module 1 | ||
}} | }} | ||
'''Xeon E3-1280 v5''' is an entry-level server and workstation {{arch|64}} [[quad-core]] [[x86]] microprocessor introduced by [[Intel]] in October 2015. This {{intel|Skylake}}-based chip operates at 3.7 GHz with turbo boost of 4 GHz. The E3-1280 v5 has a [[TDP]] of 80 Watts and supports up to 64 GiB of dual-channel DDR4-2133 memory. This MPU has no [[integrated graphics processor]]. | '''Xeon E3-1280 v5''' is an entry-level server and workstation {{arch|64}} [[quad-core]] [[x86]] microprocessor introduced by [[Intel]] in October 2015. This {{intel|Skylake}}-based chip operates at 3.7 GHz with turbo boost of 4 GHz. The E3-1280 v5 has a [[TDP]] of 80 Watts and supports up to 64 GiB of dual-channel DDR4-2133 memory. This MPU has no [[integrated graphics processor]]. |
Revision as of 07:57, 8 July 2017
Template:mpu Xeon E3-1280 v5 is an entry-level server and workstation 64-bit quad-core x86 microprocessor introduced by Intel in October 2015. This Skylake-based chip operates at 3.7 GHz with turbo boost of 4 GHz. The E3-1280 v5 has a TDP of 80 Watts and supports up to 64 GiB of dual-channel DDR4-2133 memory. This MPU has no integrated graphics processor.
Cache
- Main article: Skylake § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller
Integrated Memory Controller
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Expansions
Expansion Options
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Graphics
This chip has no integrated graphics processing unit.
Features
[Edit/Modify Supported Features]
Facts about "Xeon E3-1280 v5 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon E3-1280 v5 - Intel#io + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has ecc memory support | true + |
has extended page tables support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions +, Memory Protection Extensions +, Software Guard Extensions +, Secure Key Technology + and OS Guard + |
has intel enhanced speedstep technology | true + |
has intel secure key technology | true + |
has intel speed shift technology | true + |
has intel supervisor mode execution protection | true + |
has intel trusted execution technology | true + |
has intel vpro technology | true + |
has intel vt-d technology | true + |
has intel vt-x technology | true + |
has second level address translation support | true + |
has simultaneous multithreading | true + |
has transactional synchronization extensions | true + |
has x86 advanced encryption standard instruction set extension | true + |
l1$ size | 256 KiB (262,144 B, 0.25 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l2$ description | 4-way set associative + |
l2$ size | 1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) + |
l3$ size | 8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) + |
max memory bandwidth | 35.76 GiB/s (36,618.24 MiB/s, 38.397 GB/s, 38,397.008 MB/s, 0.0349 TiB/s, 0.0384 TB/s) + |
max memory channels | 2 + |
max pcie lanes | 16 + |
supported memory type | DDR3L-1600 + and DDR4-2133 + |
x86/has memory protection extensions | true + |
x86/has software guard extensions | true + |