From WikiChip
Difference between revisions of "intel/xeon e3/e3-1260l v5"
< intel

(→‎Cache)
Line 1: Line 1:
 
{{intel title|Xeon E3-1260L v5}}
 
{{intel title|Xeon E3-1260L v5}}
 
{{mpu
 
{{mpu
−
| name               = Xeon E3-1260L v5
+
|name=Xeon E3-1260L v5
−
| no image           =
+
|image=skylake dt (front).png
−
| image              = skylake dt (front).png
+
|image size=250px
−
| image size         = 250px
+
|designer=Intel
−
| caption            =
+
|manufacturer=Intel
−
| designer           = Intel
+
|model number=E3-1260L v5
−
| manufacturer       = Intel
+
|part number=CM8066201921903
−
| model number       = E3-1260L v5
+
|s-spec=SR2CR
−
| part number         = CM8066201921903
+
|s-spec 2=SR2LH
−
| market             = Server
+
|market=Server
−
| first announced     = October 19, 2015
+
|first announced=October 19, 2015
−
| first launched     = October 19, 2015
+
|first launched=October 19, 2015
−
| last order          =
+
|release price=$294
−
| last shipment      =
+
|family=Xeon E3
−
| release price       = $294
+
|series=E3-1200 v5
−
 
+
|locked=Yes
−
| family             = Xeon E3
+
|frequency=2,900 MHz
−
| series             = E3-1200 v5
+
|turbo frequency1=3,900 MHz
−
| locked             = Yes
+
|bus type=DMI 3.0
−
| frequency           = 2900 MHz
+
|bus links=4
−
| turbo frequency    = Yes
+
|bus rate=8 GT/s
−
| turbo frequency1   = 3900 MHz
+
|clock multiplier=29
−
| turbo frequency2    =
+
|cpuid=506E3
−
| turbo frequency3    =
+
|isa=x86-64
−
| turbo frequency4    =
+
|isa family=x86
−
| bus type           = DMI 3.0
+
|microarch=Skylake
−
| bus speed          =  
+
|platform=Greenlow
−
| bus rate           = 8 GT/s
+
|chipset=Sunrise Point
−
| clock multiplier   = 29
+
|core name=Skylake DT
−
| s-spec              = SR2CR
+
|core family=6
−
| s-spec 2            = SR2LH
+
|core model=94
−
| s-spec es          =
+
|core stepping=R0
−
| s-spec qs          =
+
|process=14 nm
−
| cpuid               = 506E3
+
|technology=CMOS
−
 
+
|die area=122 mm²
−
| isa family          = x86
+
|word size=64 bit
−
| isa                 = x86-64
+
|core count=4
−
| microarch           = Skylake
+
|thread count=8
−
| platform           = Greenlow
+
|max cpus=1
−
| chipset             = Sunrise Point
+
|max memory=64 GiB
−
| core name           = Skylake DT
+
|v core min=0.55 V
−
| core family         = 6
+
|v core max=1.52 V
−
| core model         = 14
+
|tdp=45 W
−
| core stepping       = R0
+
|tjunc min=0 °C
−
| process             = 14 nm
+
|tjunc max=100 °C
−
| transistors        =
+
|tstorage min=-25 °C
−
| technology         = CMOS
+
|tstorage max=125 °C
−
| die area           = 122 mm²
+
|package module 1={{packages/intel/lga-1151}}
−
| word size           = 64 bit
+
|turbo frequency=Yes
−
| core count         = 4
 
−
| thread count       = 8
 
−
| max cpus           = 1
 
−
| max memory         = 64 GiB
 
−
 
 
−
 
 
−
| v core min         = 0.55 V
 
−
| v core max         = 1.52 V
 
−
| sdp                =
 
−
| tdp                 = 45 W
 
−
| tjunc min           = 0 °C
 
−
| tjunc max           = 100 °C
 
−
| tcase min          =
 
−
| tcase max          =
 
−
| tstorage min       = -25 °C
 
−
| tstorage max       = 125 °C
 
−
| tambient min        =
 
−
| tambient max        =
 
−
 
 
−
| package module 1   = {{packages/intel/lga-1151}}
 
 
}}
 
}}
 
'''Xeon E3-1260L v5''' is an entry-level server and workstation {{arch|64}} [[quad-core]] [[x86]] microprocessor introduced by [[Intel]] in October 2015. This {{intel|Skylake}}-based chip operates at 2.9 GHz with turbo boost of 3.9 GHz. The E3-1260L v5 is a special low-power chip with a TDP of 45 Watts and supports up to 64 GiB of dual-channel DDR4-2133 memory. This MPU has no [[integrated graphics processor]].
 
'''Xeon E3-1260L v5''' is an entry-level server and workstation {{arch|64}} [[quad-core]] [[x86]] microprocessor introduced by [[Intel]] in October 2015. This {{intel|Skylake}}-based chip operates at 2.9 GHz with turbo boost of 3.9 GHz. The E3-1260L v5 is a special low-power chip with a TDP of 45 Watts and supports up to 64 GiB of dual-channel DDR4-2133 memory. This MPU has no [[integrated graphics processor]].

Revision as of 07:56, 8 July 2017

Template:mpu Xeon E3-1260L v5 is an entry-level server and workstation 64-bit quad-core x86 microprocessor introduced by Intel in October 2015. This Skylake-based chip operates at 2.9 GHz with turbo boost of 3.9 GHz. The E3-1260L v5 is a special low-power chip with a TDP of 45 Watts and supports up to 64 GiB of dual-channel DDR4-2133 memory. This MPU has no integrated graphics processor.

Cache

Main article: Skylake § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$256 KiB
262,144 B
0.25 MiB
L1I$128 KiB
131,072 B
0.125 MiB
4x32 KiB8-way set associative 
L1D$128 KiB
131,072 B
0.125 MiB
4x32 KiB8-way set associativewrite-back
L2$1 MiB
1,024 KiB
1,048,576 B
9.765625e-4 GiB
  4x256 KiB4-way set associativewrite-back
L3$8 MiB
8,192 KiB
8,388,608 B
0.00781 GiB
  4x2 MiB write-back

Memory controller

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR3L-1600, DDR4-2133
Supports ECCYes
Max Mem64 GiB
Controllers1
Channels2
Max Bandwidth35.76 GiB/s
36,618.24 MiB/s
38.397 GB/s
38,397.008 MB/s
0.0349 TiB/s
0.0384 TB/s
Bandwidth
Single 17.88 GiB/s
Double 35.76 GiB/s

Expansions

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIe
Revision3.0
Max Lanes16
Configs1x16, 2x8, 1x8+2x4


Graphics

This chip has no integrated graphics processing unit.

Features

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
SSEStreaming SIMD Extensions
SSE2Streaming SIMD Extensions 2
SSE3Streaming SIMD Extensions 3
SSSE3Supplemental SSE3
SSE4.1Streaming SIMD Extensions 4.1
SSE4.2Streaming SIMD Extensions 4.2
AVXAdvanced Vector Extensions
AVX2Advanced Vector Extensions 2
ABMAdvanced Bit Manipulation
BMI1Bit Manipulation Instruction Set 1
BMI2Bit Manipulation Instruction Set 2
FMA33-Operand Fused-Multiply-Add
AESAES Encryption Instructions
RdRandHardware RNG
ADXMulti-Precision Add-Carry
CLMULCarry-less Multiplication Extension
F16C16-bit Floating Point Conversion
x86-1616-bit x86
x86-3232-bit x86
x86-6464-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
NXNo-eXecute
HTHyper-Threading
EISTEnhanced SpeedStep Technology
SSTSpeed Shift Technology
TXTTrusted Execution Technology (SMX)
vProIntel vPro
VT-xVT-x (Virtualization)
VT-dVT-d (I/O MMU virtualization)
EPTExtended Page Tables (SLAT)
TSXTransactional Synchronization Extensions
MPXMemory Protection Extensions
SGXSoftware Guard Extensions
Secure KeySecure Key Technology
SMEPOS Guard Technology
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/xeon_e3/e3-1260l_v5&oldid=53204"
Facts about "Xeon E3-1260L v5 - Intel"
RDF feed
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Xeon E3-1260L v5 - Intel#io +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has ecc memory supporttrue +
has extended page tables supporttrue +
has featureAdvanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions +, Memory Protection Extensions +, Software Guard Extensions +, Secure Key Technology + and OS Guard +
has intel enhanced speedstep technologytrue +
has intel secure key technologytrue +
has intel speed shift technologytrue +
has intel supervisor mode execution protectiontrue +
has intel trusted execution technologytrue +
has intel vpro technologytrue +
has intel vt-d technologytrue +
has intel vt-x technologytrue +
has second level address translation supporttrue +
has simultaneous multithreadingtrue +
has transactional synchronization extensionstrue +
has x86 advanced encryption standard instruction set extensiontrue +
l1$ size256 KiB (262,144 B, 0.25 MiB) +
l1d$ description8-way set associative +
l1d$ size128 KiB (131,072 B, 0.125 MiB) +
l1i$ description8-way set associative +
l1i$ size128 KiB (131,072 B, 0.125 MiB) +
l2$ description4-way set associative +
l2$ size1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
l3$ size8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) +
max memory bandwidth35.76 GiB/s (36,618.24 MiB/s, 38.397 GB/s, 38,397.008 MB/s, 0.0349 TiB/s, 0.0384 TB/s) +
max memory channels2 +
max pcie lanes16 +
supported memory typeDDR3L-1600 + and DDR4-2133 +
x86/has memory protection extensionstrue +
x86/has software guard extensionstrue +