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Difference between revisions of "intel/xeon e5/e5-4667 v4"
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Revision as of 14:48, 13 December 2017
Template:mpu The Xeon E5-4667 v4 is a 64-bit octadeca-core x86 microprocessor introduced by Intel in 2016. This server MPU is designed for high-performance dense 4S environments. Operating at 2.2 GHz with a turbo boost frequency of 3 GHz for a single active core, this MPU has a TDP of 135 W and is manufactured on a 14 nm process (based on Broadwell).
Cache
- Main article: Broadwell § Cache
| Cache Info [Edit Values] | ||
| L1I$ | 576 KiB 589,824 B 0.563 MiB |
18x32 KiB 8-way set associative (per core, write-back) |
| L1D$ | 576 KiB 589,824 B 0.563 MiB |
18x32 KiB 8-way set associative (per core, write-back) |
| L2$ | 4.5 MiB 4,608 KiB 4,718,592 B 0.00439 GiB |
18x256 KiB 8-way set associative (per core, write-back) |
| L3$ | 45 MiB 46,080 KiB 47,185,920 B 0.0439 GiB |
18x2.5 MiB 20-way set associative (shared, per core, write-back) |
Graphics
This microprocessor has no integrated graphics processing unit.
Memory controller
| Integrated Memory Controller | |
| Type | DDR4-2133 |
| Controllers | 1 |
| Channels | 4 |
| ECC Support | Yes |
| Max bandwidth | 63.58 GiB/s |
| Bandwidth (single) | 15.89 GiB/s |
| Bandwidth (dual) | 31.79 GiB/s |
| Max memory | 1,536 GiB |
| Physical Address Extensions | 46 bit |
Expansions
Features
[Edit/Modify Supported Features]
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Supported x86 Extensions & Processor Features
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Facts about "Xeon E5-4667 v4 - Intel"
| has advanced vector extensions | true + |
| has advanced vector extensions 2 | true + |
| has extended page tables support | true + |
| has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Trusted Execution Technology +, Extended Page Tables + and Transactional Synchronization Extensions + |
| has intel enhanced speedstep technology | true + |
| has intel trusted execution technology | true + |
| has intel turbo boost technology 2 0 | true + |
| has second level address translation support | true + |
| has simultaneous multithreading | true + |
| has transactional synchronization extensions | true + |
| has x86 advanced encryption standard instruction set extension | true + |
| l1d$ description | 8-way set associative + |
| l1d$ size | 576 KiB (589,824 B, 0.563 MiB) + |
| l1i$ description | 8-way set associative + |
| l1i$ size | 576 KiB (589,824 B, 0.563 MiB) + |
| l2$ description | 8-way set associative + |
| l2$ size | 4.5 MiB (4,608 KiB, 4,718,592 B, 0.00439 GiB) + |
| l3$ description | 20-way set associative + |
| l3$ size | 45 MiB (46,080 KiB, 47,185,920 B, 0.0439 GiB) + |