Semiconductor & Computer Engineering
From WikiChip
Difference between revisions of "amd/k6-2/k6-2-333afr"
m (Bot: Automated text replacement (-\| electrical += Yes +)) |
m (Bot: corrected param) |
||
| Line 10: | Line 10: | ||
| model number = K6-2/333AFR | | model number = K6-2/333AFR | ||
| part number = AMD-K6-2/333AFR | | part number = AMD-K6-2/333AFR | ||
| − | |||
| part number 2 = | | part number 2 = | ||
| part number 3 = | | part number 3 = | ||
| + | | part number 4 = | ||
| market = Desktop | | market = Desktop | ||
| first announced = May 28, 1998 | | first announced = May 28, 1998 | ||
Revision as of 16:34, 30 June 2017
Template:mpu K6-2/333AFR was a 32-bit x86 K6-2-based microprocessor designed and manufactured in 1998 by AMD. Manufactured using a 0.25 µm process, this MPU operated at 333 MHz with a FSB of 95 MHz consumed 19 W. Note that K6-2/333AFR-66 is an identical model with a multiplier of 5 instead of 3.6 designed to support a 66 MHz bus instead.
Cache
- Main article: K6-2 § Cache
L2$ can be 512 KiB to 2 MiB, depending on manufacturer and motherboard model. L2$ is off-chip.
| Cache Info [Edit Values] | ||
| L1I$ | 32 KiB 32,768 B 0.0313 MiB |
1x32 KiB 2-way set associative |
| L1D$ | 32 KiB 32,768 B 0.0313 MiB |
1x32 KiB 2-way set associative |
Graphics
This SoC has no integrated graphics processing unit.
Features
- Auto-power down state
- Stop clock state
Gallery
Week 30, 1998
Documents
DataSheet
- AMD-K6-2 Processor Data Sheet; Publication #21850 Revision J/0, February 2000
Facts about "K6-2/333AFR - AMD"
| l1d$ description | 2-way set associative + |
| l1d$ size | 32 KiB (32,768 B, 0.0313 MiB) + |
| l1i$ description | 2-way set associative + |
| l1i$ size | 32 KiB (32,768 B, 0.0313 MiB) + |